From patchwork Sun Aug 20 11:53:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 715241 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 055B3EE49A4 for ; Sun, 20 Aug 2023 12:08:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230179AbjHTMIu (ORCPT ); Sun, 20 Aug 2023 08:08:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37902 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230211AbjHTMIt (ORCPT ); Sun, 20 Aug 2023 08:08:49 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7A34F173E; Sun, 20 Aug 2023 05:05:44 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 1024260B93; Sun, 20 Aug 2023 12:05:44 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id EF683C433C8; Sun, 20 Aug 2023 12:05:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692533143; bh=mYM2vfohaXJm9wMSr8t3sP42ybTz9TQCqDlYfD3i/x8=; h=From:To:Cc:Subject:Date:From; b=lBhFelwx0NXe7LAJI7Vn46GBOQtmqGHSWiJ9xvWWj7syXxBBmMS850A3yOhjhd4hW 24lA71wAFjQtELNwM9sjlDmBalHCRbXHSMeqi8a28iRF192wrZu4aA/2Ib1KIh8ODC 1FcsJI1R+n6BeR5AqBmL68bXv/bLjnzgvJ/j/4G6yhXSgg7T4LCvSLqBRwX9eaSUem 2hg/gemykNUTwdDPhAfaWze4Hg2uDidXBm87CYhpUAkAgeprjMu7FB1YJ/Bgacuc/P CHFtOfaz6jfeYNwDYVy9fviPVZPlE+B8GZoFux7vq/fEAJm1cGIrrzP2ekt1zQQ+5f iQp+8lIMBROBQ== From: Jisheng Zhang To: Guo Ren , Fu Wei , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou Cc: inux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] riscv: dts: thead: set dma-noncoherent to soc bus Date: Sun, 20 Aug 2023 19:53:53 +0800 Message-Id: <20230820115353.1962-1-jszhang@kernel.org> X-Mailer: git-send-email 2.40.0 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org riscv select ARCH_DMA_DEFAULT_COHERENT by default, and th1520 isn't dma coherent, so set dma-noncoherent to reflect this fact. Signed-off-by: Jisheng Zhang Tested-by: Drew Fustini --- arch/riscv/boot/dts/thead/th1520.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi index 56a73134b49e..58108f0eb3fd 100644 --- a/arch/riscv/boot/dts/thead/th1520.dtsi +++ b/arch/riscv/boot/dts/thead/th1520.dtsi @@ -139,6 +139,7 @@ soc { interrupt-parent = <&plic>; #address-cells = <2>; #size-cells = <2>; + dma-noncoherent; ranges; plic: interrupt-controller@ffd8000000 {