diff mbox series

[v3,06/11] PCI: plda: Add event interrupt codes and IRQ domain ops

Message ID 20230814082016.104181-7-minda.chen@starfivetech.com
State New
Headers show
Series [v3,01/11] dt-bindings: PCI: Add PLDA XpressRICH PCIe host common properties | expand

Commit Message

Minda Chen Aug. 14, 2023, 8:20 a.m. UTC
For PolarFire implements non-PLDA local interrupt events, most of
event interrupt process codes can not be re-used. PLDA implements
new codes and IRQ domain ops like PolarFire.

plda_handle_event adds a new IRQ num to event num mapping codes for
PLDA local event except DMA engine interrupt events. The DMA engine
interrupt events are implemented by vendors.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
---
 .../pci/controller/plda/pcie-microchip-host.c | 29 +++---
 drivers/pci/controller/plda/pcie-plda-host.c  | 99 +++++++++++++++++++
 drivers/pci/controller/plda/pcie-plda.h       | 19 ++++
 3 files changed, 133 insertions(+), 14 deletions(-)

Comments

Minda Chen Aug. 15, 2023, 10:12 a.m. UTC | #1
On 2023/8/14 21:52, Conor Dooley wrote:
> On Mon, Aug 14, 2023 at 04:20:11PM +0800, Minda Chen wrote:
>> For PolarFire implements non-PLDA local interrupt events, most of
>> event interrupt process codes can not be re-used. PLDA implements
>> new codes and IRQ domain ops like PolarFire.
>> 
>> plda_handle_event adds a new IRQ num to event num mapping codes for
>> PLDA local event except DMA engine interrupt events. The DMA engine
>> interrupt events are implemented by vendors.
>> 
>> Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
>> ---
>>  .../pci/controller/plda/pcie-microchip-host.c | 29 +++---
>>  drivers/pci/controller/plda/pcie-plda-host.c  | 99 +++++++++++++++++++
>>  drivers/pci/controller/plda/pcie-plda.h       | 19 ++++
>>  3 files changed, 133 insertions(+), 14 deletions(-)
>> 
>> diff --git a/drivers/pci/controller/plda/pcie-microchip-host.c b/drivers/pci/controller/plda/pcie-microchip-host.c
>> index c28840315019..b42f1aac3ec3 100644
>> --- a/drivers/pci/controller/plda/pcie-microchip-host.c
>> +++ b/drivers/pci/controller/plda/pcie-microchip-host.c
>> @@ -96,20 +96,21 @@
>>  #define EVENT_LOCAL_DMA_END_ENGINE_1		12
>>  #define EVENT_LOCAL_DMA_ERROR_ENGINE_0		13
>>  #define EVENT_LOCAL_DMA_ERROR_ENGINE_1		14
>> -#define EVENT_LOCAL_A_ATR_EVT_POST_ERR		15
>> -#define EVENT_LOCAL_A_ATR_EVT_FETCH_ERR		16
>> -#define EVENT_LOCAL_A_ATR_EVT_DISCARD_ERR	17
>> -#define EVENT_LOCAL_A_ATR_EVT_DOORBELL		18
>> -#define EVENT_LOCAL_P_ATR_EVT_POST_ERR		19
>> -#define EVENT_LOCAL_P_ATR_EVT_FETCH_ERR		20
>> -#define EVENT_LOCAL_P_ATR_EVT_DISCARD_ERR	21
>> -#define EVENT_LOCAL_P_ATR_EVT_DOORBELL		22
>> -#define EVENT_LOCAL_PM_MSI_INT_INTX		23
>> -#define EVENT_LOCAL_PM_MSI_INT_MSI		24
>> -#define EVENT_LOCAL_PM_MSI_INT_AER_EVT		25
>> -#define EVENT_LOCAL_PM_MSI_INT_EVENTS		26
>> -#define EVENT_LOCAL_PM_MSI_INT_SYS_ERR		27
>> -#define NUM_EVENTS				28
>> +#define NUM_MC_EVENTS				15
>> +#define EVENT_LOCAL_A_ATR_EVT_POST_ERR		(NUM_MC_EVENTS + EVENT_A_ATR_EVT_POST_ERR)
>> +#define EVENT_LOCAL_A_ATR_EVT_FETCH_ERR		(NUM_MC_EVENTS + EVENT_A_ATR_EVT_FETCH_ERR)
>> +#define EVENT_LOCAL_A_ATR_EVT_DISCARD_ERR	(NUM_MC_EVENTS + EVENT_A_ATR_EVT_DISCARD_ERR)
>> +#define EVENT_LOCAL_A_ATR_EVT_DOORBELL		(NUM_MC_EVENTS + EVENT_A_ATR_EVT_DOORBELL)
>> +#define EVENT_LOCAL_P_ATR_EVT_POST_ERR		(NUM_MC_EVENTS + EVENT_P_ATR_EVT_POST_ERR)
>> +#define EVENT_LOCAL_P_ATR_EVT_FETCH_ERR		(NUM_MC_EVENTS + EVENT_P_ATR_EVT_FETCH_ERR)
>> +#define EVENT_LOCAL_P_ATR_EVT_DISCARD_ERR	(NUM_MC_EVENTS + EVENT_P_ATR_EVT_DISCARD_ERR)
>> +#define EVENT_LOCAL_P_ATR_EVT_DOORBELL		(NUM_MC_EVENTS + EVENT_P_ATR_EVT_DOORBELL)
>> +#define EVENT_LOCAL_PM_MSI_INT_INTX		(NUM_MC_EVENTS + EVENT_PM_MSI_INT_INTX)
>> +#define EVENT_LOCAL_PM_MSI_INT_MSI		(NUM_MC_EVENTS + EVENT_PM_MSI_INT_MSI)
>> +#define EVENT_LOCAL_PM_MSI_INT_AER_EVT		(NUM_MC_EVENTS + EVENT_PM_MSI_INT_AER_EVT)
>> +#define EVENT_LOCAL_PM_MSI_INT_EVENTS		(NUM_MC_EVENTS + EVENT_PM_MSI_INT_EVENTS)
>> +#define EVENT_LOCAL_PM_MSI_INT_SYS_ERR		(NUM_MC_EVENTS + EVENT_PM_MSI_INT_SYS_ERR)
>> +#define NUM_EVENTS				(NUM_MC_EVENTS + NUM_PLDA_EVENTS)
> 
> Is this change not in the wrong patch & should be changed alongside the
> movement of defines? 
EVENT_xxx is new added one for PLDA codes and The event num start from 0. This add association to PLDA events.
Maybe this can be moved to patch8 or a new patch.
Conor Dooley Aug. 15, 2023, 1:11 p.m. UTC | #2
On Tue, Aug 15, 2023 at 06:12:07PM +0800, Minda Chen wrote:
> 
> 
> On 2023/8/14 21:52, Conor Dooley wrote:
> > On Mon, Aug 14, 2023 at 04:20:11PM +0800, Minda Chen wrote:
> >> For PolarFire implements non-PLDA local interrupt events, most of
> >> event interrupt process codes can not be re-used. PLDA implements
> >> new codes and IRQ domain ops like PolarFire.
> >> 
> >> plda_handle_event adds a new IRQ num to event num mapping codes for
> >> PLDA local event except DMA engine interrupt events. The DMA engine
> >> interrupt events are implemented by vendors.
> >> 
> >> Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
> >> ---
> >>  .../pci/controller/plda/pcie-microchip-host.c | 29 +++---
> >>  drivers/pci/controller/plda/pcie-plda-host.c  | 99 +++++++++++++++++++
> >>  drivers/pci/controller/plda/pcie-plda.h       | 19 ++++
> >>  3 files changed, 133 insertions(+), 14 deletions(-)
> >> 
> >> diff --git a/drivers/pci/controller/plda/pcie-microchip-host.c b/drivers/pci/controller/plda/pcie-microchip-host.c
> >> index c28840315019..b42f1aac3ec3 100644
> >> --- a/drivers/pci/controller/plda/pcie-microchip-host.c
> >> +++ b/drivers/pci/controller/plda/pcie-microchip-host.c
> >> @@ -96,20 +96,21 @@
> >>  #define EVENT_LOCAL_DMA_END_ENGINE_1		12
> >>  #define EVENT_LOCAL_DMA_ERROR_ENGINE_0		13
> >>  #define EVENT_LOCAL_DMA_ERROR_ENGINE_1		14
> >> -#define EVENT_LOCAL_A_ATR_EVT_POST_ERR		15
> >> -#define EVENT_LOCAL_A_ATR_EVT_FETCH_ERR		16
> >> -#define EVENT_LOCAL_A_ATR_EVT_DISCARD_ERR	17
> >> -#define EVENT_LOCAL_A_ATR_EVT_DOORBELL		18
> >> -#define EVENT_LOCAL_P_ATR_EVT_POST_ERR		19
> >> -#define EVENT_LOCAL_P_ATR_EVT_FETCH_ERR		20
> >> -#define EVENT_LOCAL_P_ATR_EVT_DISCARD_ERR	21
> >> -#define EVENT_LOCAL_P_ATR_EVT_DOORBELL		22
> >> -#define EVENT_LOCAL_PM_MSI_INT_INTX		23
> >> -#define EVENT_LOCAL_PM_MSI_INT_MSI		24
> >> -#define EVENT_LOCAL_PM_MSI_INT_AER_EVT		25
> >> -#define EVENT_LOCAL_PM_MSI_INT_EVENTS		26
> >> -#define EVENT_LOCAL_PM_MSI_INT_SYS_ERR		27
> >> -#define NUM_EVENTS				28
> >> +#define NUM_MC_EVENTS				15
> >> +#define EVENT_LOCAL_A_ATR_EVT_POST_ERR		(NUM_MC_EVENTS + EVENT_A_ATR_EVT_POST_ERR)
> >> +#define EVENT_LOCAL_A_ATR_EVT_FETCH_ERR		(NUM_MC_EVENTS + EVENT_A_ATR_EVT_FETCH_ERR)
> >> +#define EVENT_LOCAL_A_ATR_EVT_DISCARD_ERR	(NUM_MC_EVENTS + EVENT_A_ATR_EVT_DISCARD_ERR)
> >> +#define EVENT_LOCAL_A_ATR_EVT_DOORBELL		(NUM_MC_EVENTS + EVENT_A_ATR_EVT_DOORBELL)
> >> +#define EVENT_LOCAL_P_ATR_EVT_POST_ERR		(NUM_MC_EVENTS + EVENT_P_ATR_EVT_POST_ERR)
> >> +#define EVENT_LOCAL_P_ATR_EVT_FETCH_ERR		(NUM_MC_EVENTS + EVENT_P_ATR_EVT_FETCH_ERR)
> >> +#define EVENT_LOCAL_P_ATR_EVT_DISCARD_ERR	(NUM_MC_EVENTS + EVENT_P_ATR_EVT_DISCARD_ERR)
> >> +#define EVENT_LOCAL_P_ATR_EVT_DOORBELL		(NUM_MC_EVENTS + EVENT_P_ATR_EVT_DOORBELL)
> >> +#define EVENT_LOCAL_PM_MSI_INT_INTX		(NUM_MC_EVENTS + EVENT_PM_MSI_INT_INTX)
> >> +#define EVENT_LOCAL_PM_MSI_INT_MSI		(NUM_MC_EVENTS + EVENT_PM_MSI_INT_MSI)
> >> +#define EVENT_LOCAL_PM_MSI_INT_AER_EVT		(NUM_MC_EVENTS + EVENT_PM_MSI_INT_AER_EVT)
> >> +#define EVENT_LOCAL_PM_MSI_INT_EVENTS		(NUM_MC_EVENTS + EVENT_PM_MSI_INT_EVENTS)
> >> +#define EVENT_LOCAL_PM_MSI_INT_SYS_ERR		(NUM_MC_EVENTS + EVENT_PM_MSI_INT_SYS_ERR)
> >> +#define NUM_EVENTS				(NUM_MC_EVENTS + NUM_PLDA_EVENTS)
> > 
> > Is this change not in the wrong patch & should be changed alongside the
> > movement of defines? 
> EVENT_xxx is new added one for PLDA codes and The event num start from 0. This add association to PLDA events.
> Maybe this can be moved to patch8 or a new patch.

It feels like it should be in patch 3 to me.
diff mbox series

Patch

diff --git a/drivers/pci/controller/plda/pcie-microchip-host.c b/drivers/pci/controller/plda/pcie-microchip-host.c
index c28840315019..b42f1aac3ec3 100644
--- a/drivers/pci/controller/plda/pcie-microchip-host.c
+++ b/drivers/pci/controller/plda/pcie-microchip-host.c
@@ -96,20 +96,21 @@ 
 #define EVENT_LOCAL_DMA_END_ENGINE_1		12
 #define EVENT_LOCAL_DMA_ERROR_ENGINE_0		13
 #define EVENT_LOCAL_DMA_ERROR_ENGINE_1		14
-#define EVENT_LOCAL_A_ATR_EVT_POST_ERR		15
-#define EVENT_LOCAL_A_ATR_EVT_FETCH_ERR		16
-#define EVENT_LOCAL_A_ATR_EVT_DISCARD_ERR	17
-#define EVENT_LOCAL_A_ATR_EVT_DOORBELL		18
-#define EVENT_LOCAL_P_ATR_EVT_POST_ERR		19
-#define EVENT_LOCAL_P_ATR_EVT_FETCH_ERR		20
-#define EVENT_LOCAL_P_ATR_EVT_DISCARD_ERR	21
-#define EVENT_LOCAL_P_ATR_EVT_DOORBELL		22
-#define EVENT_LOCAL_PM_MSI_INT_INTX		23
-#define EVENT_LOCAL_PM_MSI_INT_MSI		24
-#define EVENT_LOCAL_PM_MSI_INT_AER_EVT		25
-#define EVENT_LOCAL_PM_MSI_INT_EVENTS		26
-#define EVENT_LOCAL_PM_MSI_INT_SYS_ERR		27
-#define NUM_EVENTS				28
+#define NUM_MC_EVENTS				15
+#define EVENT_LOCAL_A_ATR_EVT_POST_ERR		(NUM_MC_EVENTS + EVENT_A_ATR_EVT_POST_ERR)
+#define EVENT_LOCAL_A_ATR_EVT_FETCH_ERR		(NUM_MC_EVENTS + EVENT_A_ATR_EVT_FETCH_ERR)
+#define EVENT_LOCAL_A_ATR_EVT_DISCARD_ERR	(NUM_MC_EVENTS + EVENT_A_ATR_EVT_DISCARD_ERR)
+#define EVENT_LOCAL_A_ATR_EVT_DOORBELL		(NUM_MC_EVENTS + EVENT_A_ATR_EVT_DOORBELL)
+#define EVENT_LOCAL_P_ATR_EVT_POST_ERR		(NUM_MC_EVENTS + EVENT_P_ATR_EVT_POST_ERR)
+#define EVENT_LOCAL_P_ATR_EVT_FETCH_ERR		(NUM_MC_EVENTS + EVENT_P_ATR_EVT_FETCH_ERR)
+#define EVENT_LOCAL_P_ATR_EVT_DISCARD_ERR	(NUM_MC_EVENTS + EVENT_P_ATR_EVT_DISCARD_ERR)
+#define EVENT_LOCAL_P_ATR_EVT_DOORBELL		(NUM_MC_EVENTS + EVENT_P_ATR_EVT_DOORBELL)
+#define EVENT_LOCAL_PM_MSI_INT_INTX		(NUM_MC_EVENTS + EVENT_PM_MSI_INT_INTX)
+#define EVENT_LOCAL_PM_MSI_INT_MSI		(NUM_MC_EVENTS + EVENT_PM_MSI_INT_MSI)
+#define EVENT_LOCAL_PM_MSI_INT_AER_EVT		(NUM_MC_EVENTS + EVENT_PM_MSI_INT_AER_EVT)
+#define EVENT_LOCAL_PM_MSI_INT_EVENTS		(NUM_MC_EVENTS + EVENT_PM_MSI_INT_EVENTS)
+#define EVENT_LOCAL_PM_MSI_INT_SYS_ERR		(NUM_MC_EVENTS + EVENT_PM_MSI_INT_SYS_ERR)
+#define NUM_EVENTS				(NUM_MC_EVENTS + NUM_PLDA_EVENTS)
 
 #define PCIE_EVENT_CAUSE(x, s)	\
 	[EVENT_PCIE_ ## x] = { __stringify(x), s }
diff --git a/drivers/pci/controller/plda/pcie-plda-host.c b/drivers/pci/controller/plda/pcie-plda-host.c
index ce02cfe6b5fa..bf63f220a518 100644
--- a/drivers/pci/controller/plda/pcie-plda-host.c
+++ b/drivers/pci/controller/plda/pcie-plda-host.c
@@ -250,6 +250,105 @@  int plda_pcie_intx_map(struct irq_domain *domain, unsigned int irq,
 	return 0;
 }
 
+irqreturn_t plda_event_handler(int irq, void *dev_id)
+{
+	return IRQ_HANDLED;
+}
+
+void plda_handle_event(struct irq_desc *desc)
+{
+	struct plda_pcie_rp *port = irq_desc_get_handler_data(desc);
+	struct irq_chip *chip = irq_desc_get_chip(desc);
+	unsigned long events = 0;
+	u32 bit, val, origin;
+
+	chained_irq_enter(chip, desc);
+
+	val = readl_relaxed(port->bridge_addr + ISTATUS_LOCAL);
+	origin = val;
+	val = val >> A_ATR_EVT_POST_ERR_SHIFT;
+	events |= val & 0xff;
+	if (origin & PM_MSI_INT_INTX_MASK)
+		events |= BIT(EVENT_PM_MSI_INT_INTX);
+	val = (origin >> PM_MSI_INT_MSI_SHIFT) & 0xf;
+	events |= val << EVENT_PM_MSI_INT_MSI;
+
+	for_each_set_bit(bit, &events, port->num_events)
+		generic_handle_domain_irq(port->event_domain, bit);
+
+	chained_irq_exit(chip, desc);
+}
+
+static u32 plda_hwirq_to_mask(int hwirq)
+{
+	u32 mask;
+
+	if (hwirq < EVENT_PM_MSI_INT_INTX)
+		mask = BIT(hwirq + A_ATR_EVT_POST_ERR_SHIFT);
+	else if (hwirq == EVENT_PM_MSI_INT_INTX)
+		mask = PM_MSI_INT_INTX_MASK;
+	else
+		mask = BIT(hwirq + PM_MSI_TO_MASK_OFFSET);
+
+	return mask;
+}
+
+static void plda_ack_event_irq(struct irq_data *data)
+{
+	struct plda_pcie_rp *port = irq_data_get_irq_chip_data(data);
+
+	writel_relaxed(plda_hwirq_to_mask(data->hwirq),
+		       port->bridge_addr + ISTATUS_LOCAL);
+}
+
+static void plda_mask_event_irq(struct irq_data *data)
+{
+	struct plda_pcie_rp *port = irq_data_get_irq_chip_data(data);
+	u32 mask, val;
+
+	mask = plda_hwirq_to_mask(data->hwirq);
+
+	raw_spin_lock(&port->lock);
+	val = readl_relaxed(port->bridge_addr + IMASK_LOCAL);
+	val &= ~mask;
+	writel_relaxed(val, port->bridge_addr + IMASK_LOCAL);
+	raw_spin_unlock(&port->lock);
+}
+
+static void plda_unmask_event_irq(struct irq_data *data)
+{
+	struct plda_pcie_rp *port = irq_data_get_irq_chip_data(data);
+	u32 mask, val;
+
+	mask = plda_hwirq_to_mask(data->hwirq);
+
+	raw_spin_lock(&port->lock);
+	val = readl_relaxed(port->bridge_addr + IMASK_LOCAL);
+	val |= mask;
+	writel_relaxed(val, port->bridge_addr + IMASK_LOCAL);
+	raw_spin_unlock(&port->lock);
+}
+
+static struct irq_chip plda_event_irq_chip = {
+	.name = "PLDA PCIe EVENT",
+	.irq_ack = plda_ack_event_irq,
+	.irq_mask = plda_mask_event_irq,
+	.irq_unmask = plda_unmask_event_irq,
+};
+
+static int plda_pcie_event_map(struct irq_domain *domain, unsigned int irq,
+			       irq_hw_number_t hwirq)
+{
+	irq_set_chip_and_handler(irq, &plda_event_irq_chip, handle_level_irq);
+	irq_set_chip_data(irq, domain->host_data);
+
+	return 0;
+}
+
+static const struct irq_domain_ops plda_evt_dom_ops = {
+	.map = plda_pcie_event_map,
+};
+
 void plda_pcie_setup_window(void __iomem *bridge_base_addr, u32 index,
 			    phys_addr_t axi_addr, phys_addr_t pci_addr,
 			    size_t size)
diff --git a/drivers/pci/controller/plda/pcie-plda.h b/drivers/pci/controller/plda/pcie-plda.h
index b4daa74a8812..56483ebb678d 100644
--- a/drivers/pci/controller/plda/pcie-plda.h
+++ b/drivers/pci/controller/plda/pcie-plda.h
@@ -90,6 +90,23 @@ 
 /* PCIe Config space MSI capability structure */
 #define MC_MSI_CAP_CTRL_OFFSET			0xe0u
 
+#define EVENT_A_ATR_EVT_POST_ERR		0
+#define EVENT_A_ATR_EVT_FETCH_ERR		1
+#define EVENT_A_ATR_EVT_DISCARD_ERR		2
+#define EVENT_A_ATR_EVT_DOORBELL		3
+#define EVENT_P_ATR_EVT_POST_ERR		4
+#define EVENT_P_ATR_EVT_FETCH_ERR		5
+#define EVENT_P_ATR_EVT_DISCARD_ERR		6
+#define EVENT_P_ATR_EVT_DOORBELL		7
+#define EVENT_PM_MSI_INT_INTX			8
+#define EVENT_PM_MSI_INT_MSI			9
+#define EVENT_PM_MSI_INT_AER_EVT		10
+#define EVENT_PM_MSI_INT_EVENTS			11
+#define EVENT_PM_MSI_INT_SYS_ERR		12
+#define NUM_PLDA_EVENTS				13
+
+#define PM_MSI_TO_MASK_OFFSET			19
+
 struct plda_msi {
 	struct mutex lock;		/* Protect used bitmap */
 	struct irq_domain *msi_domain;
@@ -106,10 +123,12 @@  struct plda_pcie_rp {
 	raw_spinlock_t lock;
 	struct plda_msi msi;
 	void __iomem *bridge_addr;
+	int num_events;
 };
 
 void plda_handle_msi(struct irq_desc *desc);
 int plda_allocate_msi_domains(struct plda_pcie_rp *port);
+irqreturn_t plda_event_handler(int irq, void *dev_id);
 void plda_handle_intx(struct irq_desc *desc);
 int plda_pcie_intx_map(struct irq_domain *domain, unsigned int irq,
 		       irq_hw_number_t hwirq);