@@ -202,9 +202,8 @@ static void dwxgmac2_map_mtl_to_dma(struct mac_device_info *hw, u32 queue,
void __iomem *ioaddr = hw->pcsr;
u32 value, reg;
- reg = (queue < 4) ? XGMAC_MTL_RXQ_DMA_MAP0 : XGMAC_MTL_RXQ_DMA_MAP1;
- if (queue >= 4)
- queue -= 4;
+ reg = XGMAC_MTL_RXQ_DMA_MAP0 + (queue & ~0x3);
+ queue &= 0x3;
value = readl(ioaddr + reg);
value &= ~XGMAC_QxMDMACH(queue);
@@ -15,9 +15,9 @@
#include <linux/platform_device.h>
#include <linux/phy.h>
-#define MTL_MAX_RX_QUEUES 8
-#define MTL_MAX_TX_QUEUES 8
-#define STMMAC_CH_MAX 8
+#define MTL_MAX_RX_QUEUES 16
+#define MTL_MAX_TX_QUEUES 16
+#define STMMAC_CH_MAX 16
#define STMMAC_RX_COE_NONE 0
#define STMMAC_RX_COE_TYPE1 1
xgmac supports up to 16 rx/tx queues and up to 16 channels. Signed-off-by: Jisheng Zhang <jszhang@kernel.org> --- drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c | 5 ++--- include/linux/stmmac.h | 6 +++--- 2 files changed, 5 insertions(+), 6 deletions(-)