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Mon, 17 Jul 2023 04:34:39 -0500 Received: from xhdlakshmis40.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2507.23 via Frontend Transport; Mon, 17 Jul 2023 04:34:35 -0500 From: Sai Krishna Potthuri To: Linus Walleij , Michal Simek , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mathieu Poirier , Tanmay Shah , Ben Levinsky , Marek Vasut , Roman Gushchin , Arnd Bergmann CC: , , , , , , Sai Krishna Potthuri Subject: [PATCH 3/4] dt-bindings: pinctrl-zynqmp: Add output-enable configuration Date: Mon, 17 Jul 2023 15:03:46 +0530 Message-ID: <20230717093347.3869167-4-sai.krishna.potthuri@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230717093347.3869167-1-sai.krishna.potthuri@amd.com> References: <20230717093347.3869167-1-sai.krishna.potthuri@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT071:EE_|DM4PR12MB6445:EE_ X-MS-Office365-Filtering-Correlation-Id: 8b711fda-810b-439d-0bbd-08db86a90b9e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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SFS:(13230028)(4636009)(396003)(136003)(376002)(39860400002)(346002)(82310400008)(451199021)(40470700004)(36840700001)(46966006)(2906002)(110136005)(54906003)(478600001)(6666004)(36756003)(8676002)(7416002)(41300700001)(316002)(70206006)(70586007)(4326008)(8936002)(82740400003)(426003)(336012)(47076005)(921005)(356005)(81166007)(103116003)(86362001)(5660300002)(40460700003)(26005)(1076003)(2616005)(186003)(40480700001)(36860700001)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Jul 2023 09:34:40.4778 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8b711fda-810b-439d-0bbd-08db86a90b9e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT071.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6445 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add 'output-enable' configuration parameter to the properties list. Using these pinctrl properties observed hang issues with older Xilinx ZynqMP Platform Management Firmware, hence reverted the patch previously. Commit ff8356060e3a5e126abb ("Revert "dt-bindings: pinctrl-zynqmp: Add output-enable configuration""). Signed-off-by: Sai Krishna Potthuri Acked-by: Conor Dooley --- .../devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml index 2722dc7bb03d..1e2b9b627b12 100644 --- a/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml @@ -274,6 +274,10 @@ patternProperties: slew-rate: enum: [0, 1] + output-enable: + description: + This will internally disable the tri-state for MIO pins. + drive-strength: description: Selects the drive strength for MIO pins, in mA.