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Sun, 25 Jun 2023 03:03:05 -0700 Received: from xhdakumarma40u.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2507.23 via Frontend Transport; Sun, 25 Jun 2023 05:03:01 -0500 From: Amit Kumar Mahapatra To: , , , , , , , CC: , , , , , , Amit Kumar Mahapatra Subject: [PATCH v3 2/2] mtd: spi-nor: Avoid setting SRWD bit in SR if WP# signal not connected Date: Sun, 25 Jun 2023 15:32:51 +0530 Message-ID: <20230625100251.31589-3-amit.kumar-mahapatra@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230625100251.31589-1-amit.kumar-mahapatra@amd.com> References: <20230625100251.31589-1-amit.kumar-mahapatra@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT060:EE_|PH8PR12MB7325:EE_ X-MS-Office365-Filtering-Correlation-Id: b60f50be-09c7-4a6a-43e8-08db75636037 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ndAGr/MRvywHrXlHZDUbsRGbUs1paDHNQhWZYRFSVl1TIOu+eXY8ONnzlP3ZT57GoTSU9n5CJzZpcGddW2d72ClcMdLWxtJ1S1/NOwl0van4HhntJnXk77NXC7TxRQfYHlgFuxf81N+ayusP5T7tDMN47J3idAKDnR33CGg2dQQVCz0EZGAllum70tkSPux5FZkF4oKv9b4oIVbc191SOUClzZq0K9iWpin0l+MqsPn9m+7cfwc/Ht+WpfanTXU0toVr0KdZrpSH+3I+mv/eXoa//SNeYGoiF4A4aKWUaLmyOal53P7LPDpcSSWFNbyDANOy+/tkum/ai7DqVvyCq/mA0jXnkO20LnX/yKrt3eAQU8HMn4AFaMFoxhIpFwiuLlV1KZ6rsHzVa8Q6rtm2H+G3YR+aM7Eutq10WQLr+eMIrKo5WLosApkePG2hjtIUL7xovkrdwpWGt17h0EdulL2cCglAWH77aI4n55qwsja4TW8GyD75qMnUKMeCREIL0aNjjW3YpAVm/2gWwj0lOlADMzspQ80O4C6oY7LtoEMgJirZbkyIH3zZ3MjzqvwhD4+2fXueEayPyJAjYsQpvzZI++fEPnp+7xKTvoZQOeOFMU4ZrWOQxuMWLeHg0oUhNupysEDgqDvKxohSWaIu/f6qnoBrRQIazqPoHJdf9zihcl+wFZIcTUhi5ZCeen1HvAKLPtPqCrwwzuLkm4SW61cSjzXaaN9tYcdQCVWfXjCfYzKDPvg5zeetEaWOpyT0HzEQw2Dikq97Jmey75LqMQ== X-Forefront-Antispam-Report: CIP:165.204.84.17; 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If WP# signal is left floating or wrongly tied to GND, avoid setting SRWD bit while writing the SR during flash protection. Signed-off-by: Amit Kumar Mahapatra --- drivers/mtd/spi-nor/core.c | 3 +++ drivers/mtd/spi-nor/core.h | 1 + drivers/mtd/spi-nor/swp.c | 9 +++++++-- 3 files changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 0bb0ad14a2fc..520f5ab86d2b 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2864,6 +2864,9 @@ static void spi_nor_init_flags(struct spi_nor *nor) if (flags & NO_CHIP_ERASE) nor->flags |= SNOR_F_NO_OP_CHIP_ERASE; + if (of_property_read_bool(np, "no-wp")) + nor->flags |= SNOR_F_NO_WP; + if (flags & SPI_NOR_RWW && nor->info->n_banks > 1 && !nor->controller_ops) nor->flags |= SNOR_F_RWW; diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 4fb5ff09c63a..55b5e7abce6e 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -132,6 +132,7 @@ enum spi_nor_option_flags { SNOR_F_SWP_IS_VOLATILE = BIT(13), SNOR_F_RWW = BIT(14), SNOR_F_ECC = BIT(15), + SNOR_F_NO_WP = BIT(16), }; struct spi_nor_read_command { diff --git a/drivers/mtd/spi-nor/swp.c b/drivers/mtd/spi-nor/swp.c index 0ba716e84377..cfaba41d74d6 100644 --- a/drivers/mtd/spi-nor/swp.c +++ b/drivers/mtd/spi-nor/swp.c @@ -214,8 +214,13 @@ static int spi_nor_sr_lock(struct spi_nor *nor, loff_t ofs, uint64_t len) status_new = (status_old & ~mask & ~tb_mask) | val; - /* Disallow further writes if WP pin is asserted */ - status_new |= SR_SRWD; + /* + * Disallow further writes if WP# pin is neither left floating nor + * wrongly tied to GND(that includes internal pull-downs). + * WP# pin hard strapped to GND can be a valid use case. + */ + if (!(nor->flags & SNOR_F_NO_WP)) + status_new |= SR_SRWD; if (!use_top) status_new |= tb_mask;