From patchwork Fri Jun 16 10:45:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 693387 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5A584EB64D7 for ; Fri, 16 Jun 2023 10:54:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344389AbjFPKye (ORCPT ); Fri, 16 Jun 2023 06:54:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49384 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345419AbjFPKyP (ORCPT ); Fri, 16 Jun 2023 06:54:15 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 379CA127EF; Fri, 16 Jun 2023 03:46:08 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id A435262134; Fri, 16 Jun 2023 10:46:07 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 67B69C433C0; Fri, 16 Jun 2023 10:46:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1686912366; bh=0x7t1g8daL8i3jr7qX7O4gRvhVWJIsgPU5r60pL859Q=; h=From:Date:Subject:To:Cc:From; b=N6An/e8roTDGqNHPUonI3qtPu9G8NCWBoFvj0M07M/XvHMY/pTctc0pp8hnfo8YMZ Oh4qy7J9feVBRDbhyB15Fi8N+8AijyqK/kf0rgNouxkhXw+ZnTsC3jg4W6xPjDbZFh lSNp3lqgHFRL1zTRPCX9QvE+hygdpJqmif1ol+CRKkersu2JOU2X/72t8E1y70PZBm LaB5n6COqaj5KrEeFoz5IiLl9b7gMn5C2wGhYuRen+pYBfudEHp5jfYPznLZs7gPnR l6M575TcT6I+L8ZYjoWboAe57VW8SvwuAsiaqecD98c6rsjD9AigCViWeNpwSr59s5 zojez8n7aEwYQ== From: Michael Walle Date: Fri, 16 Jun 2023 12:45:57 +0200 Subject: [PATCH net-next] dt-bindings: net: phy: gpy2xx: more precise description MIME-Version: 1.0 Message-Id: <20230616-feature-maxlinear-dt-better-irq-desc-v1-1-57a8936543bf@kernel.org> X-B4-Tracking: v=1; b=H4sIAGQ9jGQC/x2NQQrCMBBFr1Jm7UDTShZeRVxMk187YKNOogRK7 27q8vE+72+UYYpMl24jw1ezPlMDd+ooLJLuYI2NaeiHsffO8wwpHwOvUh+aIMax8IRSYKz25og ceI6jE8D7swvUUpNk8GSSwnLEVsltfoiXYdb6/79SQuGEWui27z/ehho7mQAAAA== To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andrew Lunn , Michael Walle Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Mention that the interrupt line is just asserted for a random period of time, not the entire time. Suggested-by: Rob Herring Signed-off-by: Michael Walle --- Documentation/devicetree/bindings/net/maxlinear,gpy2xx.yaml | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) --- base-commit: f7efed9f38f886edb450041b82a6f15d663c98f8 change-id: 20230616-feature-maxlinear-dt-better-irq-desc-fd31aee6641c diff --git a/Documentation/devicetree/bindings/net/maxlinear,gpy2xx.yaml b/Documentation/devicetree/bindings/net/maxlinear,gpy2xx.yaml index d71fa9de2b64..8a3713abd1ca 100644 --- a/Documentation/devicetree/bindings/net/maxlinear,gpy2xx.yaml +++ b/Documentation/devicetree/bindings/net/maxlinear,gpy2xx.yaml @@ -17,11 +17,12 @@ properties: maxlinear,use-broken-interrupts: description: | Interrupts are broken on some GPY2xx PHYs in that they keep the - interrupt line asserted even after the interrupt status register is - cleared. Thus it is blocking the interrupt line which is usually bad - for shared lines. By default interrupts are disabled for this PHY and - polling mode is used. If one can live with the consequences, this - property can be used to enable interrupt handling. + interrupt line asserted for a random amount of time even after the + interrupt status register is cleared. Thus it is blocking the + interrupt line which is usually bad for shared lines. By default, + interrupts are disabled for this PHY and polling mode is used. If one + can live with the consequences, this property can be used to enable + interrupt handling. Affected PHYs (as far as known) are GPY215B and GPY215C. type: boolean