From patchwork Thu Jun 1 17:03:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 688443 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8B7F3C7EE2E for ; Thu, 1 Jun 2023 17:03:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231232AbjFARDx (ORCPT ); Thu, 1 Jun 2023 13:03:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46100 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231546AbjFARDu (ORCPT ); Thu, 1 Jun 2023 13:03:50 -0400 Received: from mail-ej1-x62c.google.com (mail-ej1-x62c.google.com [IPv6:2a00:1450:4864:20::62c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 56D84194 for ; Thu, 1 Jun 2023 10:03:49 -0700 (PDT) Received: by mail-ej1-x62c.google.com with SMTP id a640c23a62f3a-96f7377c86aso157446166b.1 for ; Thu, 01 Jun 2023 10:03:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1685639028; x=1688231028; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mcKcmUUCIxd110zie+CjXE9D2AXIydaNegCcV+6SNq0=; b=ONctjRxH7/blw2xSSjhjyNIP779YSdcSYRkUGkesaThER6cV4joKdyYdDD6JLkHkFT 9dPXPnNYVmtgtNsGmTVl5DwIAtdk9wF9Xdre4IvLfFtPZWvq1RutMaiLGPlmUPKE75ZQ kYi7DRj72VsybHu0nM8m82iG42xdjhwGoGEFE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685639028; x=1688231028; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mcKcmUUCIxd110zie+CjXE9D2AXIydaNegCcV+6SNq0=; b=G6l8sxqiAdKUflPyMxeQ2rfk6s2fy5s/Sbpo3ZTMvLpNZXxydl8i5YTLGXJIrZCv+2 0dRvlIxR8vfJRe1y+OvRW30xoufybq9oZY0Ql11aBKKjy944jvT+lu8Z8xy/GI084frh cLzV4XV/2GM16IHESZkoH4dhAldw9MNZsFWf9ksZzFnCvUypbVwjxWXrltZane0HNNZ+ VIlLZe1bthopoRah/inaEQqKmoqc1TrFyMUv/MsnNzjtbZLPqs4lKWVuuoPyUxkjg/bY AaJjIARTqiOsCX2kAuk8dugvLinlXrbob/dLtsk71IUdhWGSpKJJ38yJPvbT077Z+S9z pKaQ== X-Gm-Message-State: AC+VfDzRxZ+B6HUCN16ZW2zZvI7xnWDFHtzY5V3wwaqe9KmTZupm9ot4 etTwPdSZE9PI6GArpYggmaPk5g== X-Google-Smtp-Source: ACHHUZ5N3WWPiRYSAdp/Ws29GdL2rHIl5xREti1d8ZGXwyjdXbJK4oZ3W/krDLTO2yi+qhwVPxLgog== X-Received: by 2002:a17:907:ea4:b0:94f:2852:1d2b with SMTP id ho36-20020a1709070ea400b0094f28521d2bmr9669112ejc.72.1685639027798; Thu, 01 Jun 2023 10:03:47 -0700 (PDT) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-95-248-31-20.retail.telecomitalia.it. [95.248.31.20]) by smtp.gmail.com with ESMTPSA id bh25-20020a170906a0d900b0096165b2703asm10658522ejb.110.2023.06.01.10.03.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Jun 2023 10:03:47 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Amarula patchwork , michael@amarulasolutions.com, Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH 2/6] ARM: dts: stm32: add pin map for LTDC on stm32f7 Date: Thu, 1 Jun 2023 19:03:16 +0200 Message-Id: <20230601170320.2845218-3-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20230601170320.2845218-1-dario.binacchi@amarulasolutions.com> References: <20230601170320.2845218-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add pin configurations for using LTDC (LCD-tft Display Controller) on stm32f746-disco board. Signed-off-by: Dario Binacchi --- arch/arm/boot/dts/stm32f7-pinctrl.dtsi | 35 ++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm/boot/dts/stm32f7-pinctrl.dtsi b/arch/arm/boot/dts/stm32f7-pinctrl.dtsi index 9f65403295ca..f3f90b9bcd61 100644 --- a/arch/arm/boot/dts/stm32f7-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32f7-pinctrl.dtsi @@ -365,6 +365,41 @@ pins2 { bias-pull-up; }; }; + + + ltdc_pins_a: ltdc-pins-a-0 { + pins { + pinmux = , /* LCD_B0 */ + , /* LCD_B4 */ + , /* LCD_VSYNC */ + , /* LCD_HSYNC */ + , /* LCD_CLK */ + , /* LCD_R0 */ + , /* LCD_R1 */ + , /* LCD_R2 */ + , /* LCD_R3 */ + , /* LCD_R4 */ + , /* LCD_R5 */ + , /* LCD_R6 */ + , /* LCD_R7 */ + , /* LCD_G0 */ + , /* LCD_G1 */ + , /* LCD_G2 */ + , /* LCD_G3 */ + , /* LCD_G4 */ + , /* LCD_B1 */ + , /* LCD_B2 */ + , /* LCD_B3 */ + , /* LCD_G5 */ + , /* LCD_G6 */ + , /* LCD_G7 */ + , /* LCD_B5 */ + , /* LCD_B6 */ + , /* LCD_B7 */ + ; /* LCD_DE */ + slew-rate = <2>; + }; + }; }; }; };