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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id l18-20020a19c212000000b004eff1f7f206sm2224053lfc.9.2023.06.14.11.04.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Jun 2023 11:04:50 -0700 (PDT) From: Konrad Dybcio Date: Wed, 14 Jun 2023 20:04:30 +0200 Subject: [PATCH v6 11/22] interconnect: qcom: sdm660: Hook up RPM bus clk definitions MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v6-11-263283111e66@linaro.org> References: <20230526-topic-smd_icc-v6-0-263283111e66@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v6-0-263283111e66@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, Konrad Dybcio , Dmitry Baryshkov X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686765872; l=1986; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=xMlMRTkT4oZ3O3DhlrRW9yoPIGqYk7SOo/vjpjmWPac=; b=H5234cvJ6NDXbJ3laLRNvGm0U7WrBzqr6vGHOzp9t+WHv7ao+g6ma5IyvYB0Dk0vC/iE/Pbx6 BjbVHAEfGJmAWBaFORV2nK1oqGr+DBtBi8W2YzmiSq2rQLK1aHyJaRy X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Assign the necessary definitions to migrate to the new bus clock handling mechanism. Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/sdm660.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/interconnect/qcom/sdm660.c b/drivers/interconnect/qcom/sdm660.c index e7bd86808f13..ad5d52af7eab 100644 --- a/drivers/interconnect/qcom/sdm660.c +++ b/drivers/interconnect/qcom/sdm660.c @@ -1510,6 +1510,7 @@ static const struct qcom_icc_desc sdm660_a2noc = { .type = QCOM_ICC_NOC, .nodes = sdm660_a2noc_nodes, .num_nodes = ARRAY_SIZE(sdm660_a2noc_nodes), + .bus_clk_desc = &aggre2_clk, .intf_clocks = a2noc_intf_clocks, .num_intf_clocks = ARRAY_SIZE(a2noc_intf_clocks), .regmap_cfg = &sdm660_a2noc_regmap_config, @@ -1538,6 +1539,7 @@ static const struct qcom_icc_desc sdm660_bimc = { .type = QCOM_ICC_BIMC, .nodes = sdm660_bimc_nodes, .num_nodes = ARRAY_SIZE(sdm660_bimc_nodes), + .bus_clk_desc = &bimc_clk, .regmap_cfg = &sdm660_bimc_regmap_config, }; @@ -1592,6 +1594,7 @@ static const struct qcom_icc_desc sdm660_cnoc = { .type = QCOM_ICC_NOC, .nodes = sdm660_cnoc_nodes, .num_nodes = ARRAY_SIZE(sdm660_cnoc_nodes), + .bus_clk_desc = &bus_2_clk, .regmap_cfg = &sdm660_cnoc_regmap_config, }; @@ -1654,6 +1657,7 @@ static const struct qcom_icc_desc sdm660_mnoc = { .type = QCOM_ICC_NOC, .nodes = sdm660_mnoc_nodes, .num_nodes = ARRAY_SIZE(sdm660_mnoc_nodes), + .bus_clk_desc = &mmaxi_0_clk, .intf_clocks = mm_intf_clocks, .num_intf_clocks = ARRAY_SIZE(mm_intf_clocks), .regmap_cfg = &sdm660_mnoc_regmap_config, @@ -1691,6 +1695,7 @@ static const struct qcom_icc_desc sdm660_snoc = { .type = QCOM_ICC_NOC, .nodes = sdm660_snoc_nodes, .num_nodes = ARRAY_SIZE(sdm660_snoc_nodes), + .bus_clk_desc = &bus_1_clk, .regmap_cfg = &sdm660_snoc_regmap_config, };