From patchwork Sun May 21 20:23:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 684643 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 38548C83005 for ; Sun, 21 May 2023 20:23:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230521AbjEUUXe (ORCPT ); Sun, 21 May 2023 16:23:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46076 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231157AbjEUUXd (ORCPT ); Sun, 21 May 2023 16:23:33 -0400 Received: from mail-lj1-x230.google.com (mail-lj1-x230.google.com [IPv6:2a00:1450:4864:20::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CC7FDE1 for ; Sun, 21 May 2023 13:23:31 -0700 (PDT) Received: by mail-lj1-x230.google.com with SMTP id 38308e7fff4ca-2af2e1725bdso17190301fa.0 for ; Sun, 21 May 2023 13:23:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1684700610; x=1687292610; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ujbBGu8nGiP/h9rfr9gVKTTQULVffaVS2QNK/83ptks=; b=QC/E2i3OXnDxs/eb5B1U1v46kPT0lK6WoD5+vRejtBLOu3F2Lh2CJIBfeaaEP9fcr2 hm0+O0JenQk4wSAi1iG31dtFli9tpAk+lEfwqaios0uepOb5chZ9szkPHx5lEyjxI6n+ C5RzhI4yfrP+tv7xBp2VEo1m1ES9rf+rkHAtMtB6/MlF7qrF34cwNsPm/lnuavucmjup Nra38bStO2qRfSk2QRdbTt+8PqeF2I5pjBYOTLt6ptnilfBOxtZn179E8UnSuXrUBJsy GQcS9R1lVOTuPbBldH/+3r1Vj/ylgtEpppdlirUNEezdrTNJxulTKt+vyBsLGRegFVLp 2M6Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1684700610; x=1687292610; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ujbBGu8nGiP/h9rfr9gVKTTQULVffaVS2QNK/83ptks=; b=UyqPC5PnH8toh57Gf+Z50DjGJwNv7Icv8UdvvDzcyLyW2jkwL9DtJGJT6Vg/OfwPEW BXuWKlIWcD4yo9UxepKUdb0iEqmyxGqKgNiYFfLxF8Cw2IyNK2fz+cm1FX9h58rdLYqm DXAi0gJJZQ/u8c4bHlTlt1lSdpZ5fHj9fBNVDZRlfUGfoZrg2GVGuXfAsw0OwKAoxy1t 4++VNVO9OwKoB1PWwLL/arE5yYmJ8tQsR/r/mlfMZr87ka/9YfL1pP4+qeUQx1HczwHF WgNHB19HqA3jON0/Es3fXIX7+Laz2+R4BdFTB1Z4YpLK+5eHqhBF5KQcPb/Xxnx3JimE 9ckA== X-Gm-Message-State: AC+VfDzllNWERX0yTelDSX87aKjyFGqKviVras+0Ukp9/kPjgCumurV7 +ysSNeyTwstEC67YaqxgKejqNQ== X-Google-Smtp-Source: ACHHUZ5BQDao0pn5+RgO6pY9wzXysgDRg1i8+G3q7xhWB0mwtLXQBHep/UbV7UjhOIdnz5RueQedMA== X-Received: by 2002:a05:651c:2ce:b0:2af:1460:4253 with SMTP id f14-20020a05651c02ce00b002af14604253mr3079546ljo.3.1684700610075; Sun, 21 May 2023 13:23:30 -0700 (PDT) Received: from umbar.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id u23-20020a2e91d7000000b002adb566dc10sm835589ljg.129.2023.05.21.13.23.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 21 May 2023 13:23:29 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski Cc: Philipp Zabel , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, Neil Armstrong Subject: [PATCH v3 10/10] arm64: dts: qcom: sm8250: switch USB+DP QMP PHY to new style of bindings Date: Sun, 21 May 2023 23:23:21 +0300 Message-Id: <20230521202321.19778-11-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230521202321.19778-1-dmitry.baryshkov@linaro.org> References: <20230521202321.19778-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Change the USB QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Reviewed-by: Neil Armstrong Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 49 ++++++++-------------------- 1 file changed, 14 insertions(+), 35 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 7bea916900e2..a260e4a7305b 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -3539,48 +3540,26 @@ usb_2_hsphy: phy@88e4000 { resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; }; - usb_1_qmpphy: phy@88e9000 { + usb_1_qmpphy: phy@88e8000 { compatible = "qcom,sm8250-qmp-usb3-dp-phy"; - reg = <0 0x088e9000 0 0x200>, - <0 0x088e8000 0 0x40>, - <0 0x088ea000 0 0x200>; + reg = <0 0x088e8000 0 0x3000>; status = "disabled"; - #address-cells = <2>; - #size-cells = <2>; - ranges; clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, <&rpmhcc RPMH_CXO_CLK>, - <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; - clock-names = "aux", "ref_clk_src", "com_aux"; + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; + clock-names = "aux", + "ref", + "com_aux", + "usb3_pipe"; resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, <&gcc GCC_USB3_PHY_PRIM_BCR>; reset-names = "phy", "common"; - usb_1_ssphy: usb3-phy@88e9200 { - reg = <0 0x088e9200 0 0x200>, - <0 0x088e9400 0 0x200>, - <0 0x088e9c00 0 0x400>, - <0 0x088e9600 0 0x200>, - <0 0x088e9800 0 0x200>, - <0 0x088e9a00 0 0x100>; - #clock-cells = <0>; - #phy-cells = <0>; - clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; - clock-names = "pipe0"; - clock-output-names = "usb3_phy_pipe_clk_src"; - }; - - dp_phy: dp-phy@88ea200 { - reg = <0 0x088ea200 0 0x200>, - <0 0x088ea400 0 0x200>, - <0 0x088eaa00 0 0x200>, - <0 0x088ea600 0 0x200>, - <0 0x088ea800 0 0x200>; - #phy-cells = <0>; - #clock-cells = <1>; - }; + #clock-cells = <1>; + #phy-cells = <1>; }; usb_2_qmpphy: phy@88eb000 { @@ -3725,7 +3704,7 @@ usb_1_dwc3: usb@a600000 { iommus = <&apps_smmu 0x0 0x0>; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; - phys = <&usb_1_hsphy>, <&usb_1_ssphy>; + phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; }; }; @@ -4415,8 +4394,8 @@ dispcc: clock-controller@af00000 { <&dsi0_phy 1>, <&dsi1_phy 0>, <&dsi1_phy 1>, - <&dp_phy 0>, - <&dp_phy 1>; + <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>, + <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>; clock-names = "bi_tcxo", "dsi0_phy_pll_out_byteclk", "dsi0_phy_pll_out_dsiclk",