From patchwork Fri May 12 00:32:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 681396 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E5CEC7EE30 for ; Fri, 12 May 2023 00:32:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239647AbjELAcj (ORCPT ); Thu, 11 May 2023 20:32:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43396 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239645AbjELAch (ORCPT ); Thu, 11 May 2023 20:32:37 -0400 Received: from mail-lf1-x131.google.com (mail-lf1-x131.google.com [IPv6:2a00:1450:4864:20::131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AA02455BA for ; Thu, 11 May 2023 17:32:35 -0700 (PDT) Received: by mail-lf1-x131.google.com with SMTP id 2adb3069b0e04-4f14468ef54so10619462e87.0 for ; Thu, 11 May 2023 17:32:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1683851554; x=1686443554; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=EozoSLIyO4NfUjrGfpaN6BKAXGeLSjYSJ3pwKwjmBi4=; b=fmJ3l+NLPeVuw3mHmaKKlmCDF1oygH//kfOCUo0x2x9J8e6JreXzT4Io6KVLJEaZOu iB2g1RUCMOwSidlq+Re2W/jBIxFLA9NEfCi66NGuuKpD5dKBrj4XSNRRftrvgaX1bNjy 1Rkgzbam73a0un779/651pgGxOJObACaF3/TL85D23nuCKdudw9/Q0CmMoRMgn/CyLZi QGlO/qJvKUj5wPqV3sya1xWAbnVmhyBejRT/UdvoAvxpy1mRcn5DaUitJ/nJyViKsX1R ha4C450uKUOOoiTHJ6v2lQskGlad9i84fuWeCg90BaeBGNL34Va0QStBcondmknwIGZ1 IFNQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683851554; x=1686443554; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=EozoSLIyO4NfUjrGfpaN6BKAXGeLSjYSJ3pwKwjmBi4=; b=cf5iXo5dxiI9Y4k8dWQkRyxFf6dpQ6qJYtbahA5pRBjiuZbmt3MD4TefKakZkP2h7F ysa0bONbgQRP2SvzGfu9ktbrhi2/l+LycOgVGfu+5R8YLjO/cC07Za11YDHrfGJoE0Pt OUbFWcoV1uW0ldhIuZsV6gxkzrUWw1cYN0JG7K9ZfbNJjq3TZ0yJ46HdouBXZ0sSWoNn pogoKlDQdGmzGdTdASASGefJzYXrk7LEOJukxxY5Y8mvOwH1g8McT2Edrjjw6U7nNXZB 5yaIQKfVF+zjaqrPv0OPQI+UGd5glq6yZI1QWRIBG41mu8QcytjQAwTwe0Itpw3+Po7J daww== X-Gm-Message-State: AC+VfDwcXkNAoH3PR4zyeT2S0dR5y6f0MqhtWX252a7mfhTPEmae3+hr h4+m/hhIXeTfa6n4Hly4Im4gOyN2V/YSRHgzWr8= X-Google-Smtp-Source: ACHHUZ4N71DdELopXh1zMv1kYRYvmezMBX/4CQBjDd13hKVI7irqoPl1yDlGUsHceriqjinYWN4vqQ== X-Received: by 2002:ac2:4944:0:b0:4ef:d4ee:1a6a with SMTP id o4-20020ac24944000000b004efd4ee1a6amr2979215lfi.44.1683851553858; Thu, 11 May 2023 17:32:33 -0700 (PDT) Received: from umbar.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id i7-20020a056512006700b004f13cd61ebbsm1282708lfo.175.2023.05.11.17.32.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 May 2023 17:32:33 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v2 03/10] dt-bindings: clock: provide separate bindings for qcom,gcc-mdm9615 Date: Fri, 12 May 2023 03:32:23 +0300 Message-Id: <20230512003230.3043284-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230512003230.3043284-1-dmitry.baryshkov@linaro.org> References: <20230512003230.3043284-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The global clock controller on MDM9615 uses external CXO and PLL7 clocks. Split the qcom,gcc-mdm9615 to the separate schema file. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Dmitry Baryshkov --- .../bindings/clock/qcom,gcc-mdm9615.yaml | 48 +++++++++++++++++++ .../bindings/clock/qcom,gcc-other.yaml | 3 -- 2 files changed, 48 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-mdm9615.yaml diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9615.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9615.yaml new file mode 100644 index 000000000000..bc9786f2c1d5 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9615.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,gcc-mdm9615.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Global Clock & Reset Controller on MDM9615 + +maintainers: + - Stephen Boyd + - Taniya Das + +description: | + Qualcomm global clock control module provides the clocks, resets and power + domains on MDM9615. + + See also:: + include/dt-bindings/clock/qcom,gcc-mdm9615.h + include/dt-bindings/reset/qcom,gcc-mdm9615.h + +allOf: + - $ref: qcom,gcc.yaml# + +properties: + compatible: + const: qcom,gcc-mdm9615 + + clocks: + maxItems: 2 + +required: + - compatible + +unevaluatedProperties: false + +examples: + - | + #include + clock-controller@900000 { + compatible = "qcom,gcc-mdm9615"; + reg = <0x00900000 0x4000>; + #power-domain-cells = <1>; + #clock-cells = <1>; + #reset-cells = <1>; + clocks = <&cxo_board>, <&lcc PLL4>; + clock-names = "cxo", "pll4"; + }; +... diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml index ae01e7749534..b6e260755a21 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml @@ -19,8 +19,6 @@ description: | include/dt-bindings/reset/qcom,gcc-ipq6018.h include/dt-bindings/clock/qcom,gcc-msm8953.h include/dt-bindings/clock/qcom,gcc-mdm9607.h - include/dt-bindings/clock/qcom,gcc-mdm9615.h - include/dt-bindings/reset/qcom,gcc-mdm9615.h allOf: - $ref: qcom,gcc.yaml# @@ -31,7 +29,6 @@ properties: - qcom,gcc-ipq6018 - qcom,gcc-mdm9607 - qcom,gcc-msm8953 - - qcom,gcc-mdm9615 required: - compatible