From patchwork Tue Apr 11 10:03:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 672485 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F13FAC76196 for ; Tue, 11 Apr 2023 10:05:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229454AbjDKKE3 (ORCPT ); Tue, 11 Apr 2023 06:04:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52146 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229510AbjDKKEE (ORCPT ); Tue, 11 Apr 2023 06:04:04 -0400 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 31E203C2A; Tue, 11 Apr 2023 03:04:02 -0700 (PDT) X-IronPort-AV: E=Sophos;i="5.98,336,1673881200"; d="scan'208";a="155587911" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 11 Apr 2023 19:04:02 +0900 Received: from localhost.localdomain (unknown [10.226.93.123]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id E79C3400F2DF; Tue, 11 Apr 2023 19:03:58 +0900 (JST) From: Biju Das To: Rob Herring , Mauro Carvalho Chehab , Krzysztof Kozlowski Cc: Biju Das , Geert Uytterhoeven , Laurent Pinchart , Magnus Damm , linux-renesas-soc@vger.kernel.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Prabhakar Mahadev Lad Subject: [PATCH v2 2/8] arm64: dts: renesas: r9a07g054: Add fcpvd node Date: Tue, 11 Apr 2023 11:03:40 +0100 Message-Id: <20230411100346.299768-3-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230411100346.299768-1-biju.das.jz@bp.renesas.com> References: <20230411100346.299768-1-biju.das.jz@bp.renesas.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add fcpvd node to RZ/V2L SoC DTSI. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven --- v1->v2: * Added Rb tag from Geert. * Reorder the patch based on the module fcpvd, vspd and then DSI for both RZ/G2L and RZ/V2L. --- arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi index 304ade54425b..9001673a9e3c 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi @@ -623,6 +623,18 @@ sbc: spi@10060000 { status = "disabled"; }; + fcpvd: fcp@10880000 { + compatible = "renesas,r9a07g054-fcpvd", + "renesas,fcpv"; + reg = <0 0x10880000 0 0x10000>; + clocks = <&cpg CPG_MOD R9A07G054_LCDC_CLK_A>, + <&cpg CPG_MOD R9A07G054_LCDC_CLK_P>, + <&cpg CPG_MOD R9A07G054_LCDC_CLK_D>; + clock-names = "aclk", "pclk", "vclk"; + power-domains = <&cpg>; + resets = <&cpg R9A07G054_LCDC_RESET_N>; + }; + cpg: clock-controller@11010000 { compatible = "renesas,r9a07g054-cpg"; reg = <0 0x11010000 0 0x10000>;