From patchwork Thu Apr 6 20:07:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 670862 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5DB7CC77B71 for ; Thu, 6 Apr 2023 20:08:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238761AbjDFUII (ORCPT ); Thu, 6 Apr 2023 16:08:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43358 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238813AbjDFUIE (ORCPT ); Thu, 6 Apr 2023 16:08:04 -0400 Received: from mail-wr1-x436.google.com (mail-wr1-x436.google.com [IPv6:2a00:1450:4864:20::436]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0FF619ECE for ; Thu, 6 Apr 2023 13:07:56 -0700 (PDT) Received: by mail-wr1-x436.google.com with SMTP id y14so40684939wrq.4 for ; Thu, 06 Apr 2023 13:07:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20210112.gappssmtp.com; s=20210112; t=1680811676; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=X/qILjo31dKZRnx2BX/LkX4PumS7avDA/rk4boexQqw=; b=mWXFvaBTMes2+5FGcHrA86JEiUqUUTA8C1NMuHGOQ/4j5VwacWsbgogLhiFPWMNS1U qZHmMk6g1RmkM1MUB073AuluNGMHZSoA9v+FLJ2ZIIU100uQ8XWCHn6quje58KDTIvjk EDfkqbwnZ634sNQEunfyQNJUNH8otZS1hJEgdjQlxlAZv6f5Q9qdk9cZv1yLhjWoTj5C BxzHiqa6Wc1eOb11bJUqHP1HkZ0/7fIFWvhdjILp5xuZ0M5ihwPWcdcQ96+NSx4nU+MH oPZ0W/VhZJSPkp/0L/H36Acg3v2JNzMCFyXbjeLvDjooL3LUZ7lvmfX4g7/3diXHxv+x 3Njg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680811676; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=X/qILjo31dKZRnx2BX/LkX4PumS7avDA/rk4boexQqw=; b=QznSJzdTXmf1uaGx2OOs8X/OoQxxwjN9I05HthG2I2iMIMpnstVbGi5vvfwrylhSjF c4Y13FQ5XPnn0vizOWOryhVqpn00ALLP636LWPdF4jiCX0HqwV6P/4vdBDJku94ByB3q Bj4lr9IUqJ2/ONExIadNvNOlp+4XpJUgRzeqnoNiOcMM2rHJLhF8S+zGq5QZ5xz+Pii7 6YNUf+9thM22JtPR35mqCK4sKyYvHOBK+8Fxl/jSvg0RWniXZqc7mm5Ehe8y9kmObKGs yIQTOuK1ZvymVMf/OxEWluJmbQu02ys29c1aThTFtvHVz0fECURl0c4pE0gt00zR3ucU Rpdw== X-Gm-Message-State: AAQBX9fjHrW46IEuqd11KU/TcbALGlqRcttErjD820CBoGv6gTWN38r9 a3qUd8swy617shxa+a8LgFnXVA== X-Google-Smtp-Source: AKy350beFouznKsGY5cO6VPMl+btQGI5bQmEMBut1bMbkKXE41VbY78i9lJQNg9ULlpIJIn036ehbw== X-Received: by 2002:adf:e74d:0:b0:2ce:a85d:5319 with SMTP id c13-20020adfe74d000000b002cea85d5319mr7927093wrn.39.1680811676506; Thu, 06 Apr 2023 13:07:56 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:4793:cb9a:340b:2f72]) by smtp.gmail.com with ESMTPSA id c11-20020adfe74b000000b002d89e113691sm2560506wrn.52.2023.04.06.13.07.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 06 Apr 2023 13:07:56 -0700 (PDT) From: Bartosz Golaszewski To: Bjorn Andersson , Andy Gross , Konrad Dybcio , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Will Deacon , Robin Murphy , Joerg Roedel , Catalin Marinas , Arnd Bergmann Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, Bartosz Golaszewski Subject: [PATCH v2 7/7] arm64: dts: qcom: sa8775p: add the GPU IOMMU node Date: Thu, 6 Apr 2023 22:07:23 +0200 Message-Id: <20230406200723.552644-8-brgl@bgdev.pl> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230406200723.552644-1-brgl@bgdev.pl> References: <20230406200723.552644-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Bartosz Golaszewski Add the GPU IOMMU for sa8775p-based platforms. Signed-off-by: Bartosz Golaszewski --- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 36 +++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index f799cb5abb87..f46c1a73abdb 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -605,6 +606,41 @@ gpucc: clock-controller@3d90000 { #power-domain-cells = <1>; }; + kgsl_smmu: iommu@3da0000 { + compatible = "qcom,sa8775p-smmu-500", "qcom,smmu-500", "arm,mmu-500"; + reg = <0x0 0x03da0000 0x0 0x20000>; + #iommu-cells = <2>; + #global-interrupts = <2>; + dma-coherent; + power-domains = <&gpucc GPU_CC_CX_GDSC>; + clocks = <&gcc GCC_GPU_MEMNOC_GFX_CLK>, + <&gcc GCC_GPU_SNOC_DVM_GFX_CLK>, + <&gpucc GPU_CC_AHB_CLK>, + <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>, + <&gpucc GPU_CC_CX_GMU_CLK>, + <&gpucc GPU_CC_HUB_CX_INT_CLK>, + <&gpucc GPU_CC_HUB_AON_CLK>; + clock-names = "gcc_gpu_memnoc_gfx_clk", + "gcc_gpu_snoc_dvm_gfx_clk", + "gpu_cc_ahb_clk", + "gpu_cc_hlos1_vote_gpu_smmu_clk", + "gpu_cc_cx_gmu_clk", + "gpu_cc_hub_cx_int_clk", + "gpu_cc_hub_aon_clk"; + interrupts = , + , + , + , + , + , + , + , + , + , + , + ; + }; + pdc: interrupt-controller@b220000 { compatible = "qcom,sa8775p-pdc", "qcom,pdc"; reg = <0x0 0x0b220000 0x0 0x30000>,