From patchwork Fri Mar 24 02:12:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Allen-KH Cheng X-Patchwork-Id: 666735 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EC5F6C6FD1C for ; Fri, 24 Mar 2023 02:13:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231303AbjCXCNS (ORCPT ); Thu, 23 Mar 2023 22:13:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41480 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231278AbjCXCNQ (ORCPT ); Thu, 23 Mar 2023 22:13:16 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AF20B298EF; Thu, 23 Mar 2023 19:13:13 -0700 (PDT) X-UUID: 6838d9b0c9e911edb6b9f13eb10bd0fe-20230324 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=xcgV1aFJZyuT4duG4UGVRTSzUC7rIMfUP49ozcB4b38=; b=mTaDNjV7c3NTdok3f2G/Ma9hqRMUjDXu0d2Kce0GnNru3kqAFwxsqONdk4yklehMyPUqNN9Gv75hbZXVOGEAZFq3OMdJkxHCgM7hMiO819t+qTMO7h6tWMmUDxQ71uVc6vGQS2GF2dPSKXt1HV6TZrw2qYwzMoQ6ulOzwrMFyko=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.22, REQID:2484b0c1-81c4-4217-823f-cc9f7244f11d, IP:0, U RL:0,TC:0,Content:-5,EDM:-30,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTI ON:release,TS:-35 X-CID-META: VersionHash:120426c, CLOUDID:ca4f34b4-beed-4dfc-bd9c-e1b22fa6ccc4, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:2,IP:nil,UR L:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-UUID: 6838d9b0c9e911edb6b9f13eb10bd0fe-20230324 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 673169923; Fri, 24 Mar 2023 10:13:03 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.25; Fri, 24 Mar 2023 10:13:01 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.25 via Frontend Transport; Fri, 24 Mar 2023 10:13:01 +0800 From: Allen-KH Cheng To: Matthias Brugger , Rob Herring , Krzysztof Kozlowski , Stephen Boyd , AngeloGioacchino Del Regno CC: , , , , , , Allen-KH Cheng Subject: [PATCH v5 4/6] arm64: dts: mediatek: mt8186: Add ADSP node Date: Fri, 24 Mar 2023 10:12:56 +0800 Message-ID: <20230324021258.15863-5-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230324021258.15863-1-allen-kh.cheng@mediatek.com> References: <20230324021258.15863-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add ADSP node for MT8186 SoC. Signed-off-by: Allen-KH Cheng Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8186.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi index 0e42bdbd2cb6..337bcf3c1571 100644 --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi @@ -633,6 +633,22 @@ interrupts = ; }; + adsp: adsp@10680000 { + compatible = "mediatek,mt8186-dsp"; + reg = <0 0x10680000 0 0x2000>, <0 0x10800000 0 0x100000>, + <0 0x1068b000 0 0x100>, <0 0x1068f000 0 0x1000>; + reg-names = "cfg", "sram", "sec", "bus"; + clocks = <&topckgen CLK_TOP_AUDIODSP>, <&topckgen CLK_TOP_ADSP_BUS>; + clock-names = "audiodsp", "adsp_bus"; + assigned-clocks = <&topckgen CLK_TOP_AUDIODSP>, + <&topckgen CLK_TOP_ADSP_BUS>; + assigned-clock-parents = <&clk26m>, <&topckgen CLK_TOP_MAINPLL_D2_D2>; + mbox-names = "rx", "tx"; + mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>; + power-domains = <&spm MT8186_POWER_DOMAIN_ADSP_TOP>; + status = "disabled"; + }; + adsp_mailbox0: mailbox@10686000 { compatible = "mediatek,mt8186-adsp-mbox"; #mbox-cells = <0>;