diff mbox series

[10/15] dt-bindings: serial: Document ma35d1 uart controller bindings

Message ID 20230315072902.9298-11-ychuang570808@gmail.com
State Superseded
Headers show
Series Introduce Nuvoton ma35d1 SoC | expand

Commit Message

Jacky Huang March 15, 2023, 7:28 a.m. UTC
From: Jacky Huang <ychuang3@nuvoton.com>

Add documentation to describe nuvoton ma35d1 uart driver bindings.

Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
---
 .../serial/nuvoton,ma35d1-serial.yaml         | 52 +++++++++++++++++++
 1 file changed, 52 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/serial/nuvoton,ma35d1-serial.yaml

Comments

Krzysztof Kozlowski March 16, 2023, 7:40 a.m. UTC | #1
On 15/03/2023 08:28, Jacky Huang wrote:
> From: Jacky Huang <ychuang3@nuvoton.com>
> 
> Add documentation to describe nuvoton ma35d1 uart driver bindings.

Subject: drop second/last, redundant "bindings". The "dt-bindings"
prefix is already stating that these are bindings.

> 
> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
> ---
>  .../serial/nuvoton,ma35d1-serial.yaml         | 52 +++++++++++++++++++
>  1 file changed, 52 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/serial/nuvoton,ma35d1-serial.yaml
> 
> diff --git a/Documentation/devicetree/bindings/serial/nuvoton,ma35d1-serial.yaml b/Documentation/devicetree/bindings/serial/nuvoton,ma35d1-serial.yaml
> new file mode 100644
> index 000000000000..9daa2efd4734
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/serial/nuvoton,ma35d1-serial.yaml
> @@ -0,0 +1,52 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/serial/nuvoton,ma35d1-serial.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nuvoton MA35D1 Universal Asynchronous Receiver/Transmitter (UART)
> +
> +maintainers:
> +  - Min-Jen Chen <mjchen@nuvoton.com>
> +  - Jacky Huang <ychuang3@nuvoton.com>
> +
> +allOf:
> +  - $ref: "serial.yaml"

Drop quotes. Use some recent bindings as your starting point, so we do
not have to give comments for things which were already fixed.

> +
> +properties:
> +  compatible:
> +    const: nuvoton,ma35d1-uart
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  clocks:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - clocks
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
> +
> +    aliases {
> +        serial0 = &uart0;
> +    };

Drop aliases.

> +
> +    uart0:serial@40700000 {

Drop label

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/serial/nuvoton,ma35d1-serial.yaml b/Documentation/devicetree/bindings/serial/nuvoton,ma35d1-serial.yaml
new file mode 100644
index 000000000000..9daa2efd4734
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/nuvoton,ma35d1-serial.yaml
@@ -0,0 +1,52 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/serial/nuvoton,ma35d1-serial.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nuvoton MA35D1 Universal Asynchronous Receiver/Transmitter (UART)
+
+maintainers:
+  - Min-Jen Chen <mjchen@nuvoton.com>
+  - Jacky Huang <ychuang3@nuvoton.com>
+
+allOf:
+  - $ref: "serial.yaml"
+
+properties:
+  compatible:
+    const: nuvoton,ma35d1-uart
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
+
+    aliases {
+        serial0 = &uart0;
+    };
+
+    uart0:serial@40700000 {
+        compatible = "nuvoton,ma35d1-uart";
+        reg = <0x40700000 0x100>;
+        interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&clk UART0_GATE>;
+    };
+...