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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id u28-20020ac243dc000000b004db2978e330sm1194222lfl.258.2023.03.16.04.17.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 04:17:11 -0700 (PDT) From: Konrad Dybcio Date: Thu, 16 Mar 2023 12:16:58 +0100 Subject: [PATCH 3/5] arm64: dts: qcom: sm6350: Add QFPROM node MIME-Version: 1.0 Message-Id: <20230315-topic-lagoon_gpu-v1-3-a74cbec4ecfc@linaro.org> References: <20230315-topic-lagoon_gpu-v1-0-a74cbec4ecfc@linaro.org> In-Reply-To: <20230315-topic-lagoon_gpu-v1-0-a74cbec4ecfc@linaro.org> To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , AngeloGioacchino Del Regno Cc: Marijn Suijten , Rob Herring , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678965426; l=963; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=j4PNB4+G8/dM10UVcLzfnSLHfKZoes3Hu7z8kNdTYNk=; b=aCZnPj85u8/se75uEUhkWctyNzjU2/Ra7v0a5zk57RGX680lQLtOrnw3OoAMYSJ/+JsQUtaAIbPy XzJhpZBzCPjhiyvXGT6gM5aUV8LebqK2/rseDzPG3lhVJxfgkD/f X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Konrad Dybcio Add a node for the QFPROM NVMEM hw and define the GPU fuse. Signed-off-by: Konrad Dybcio Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index 523c7edfa4b3..60b68d305e53 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -637,6 +637,18 @@ ipcc: mailbox@408000 { #mbox-cells = <2>; }; + qfprom: qfprom@784000 { + compatible = "qcom,sm6350-qfprom", "qcom,qfprom"; + reg = <0 0x00784000 0 0x3000>; + #address-cells = <1>; + #size-cells = <1>; + + gpu_speed_bin: gpu_speed_bin@2015 { + reg = <0x2015 0x1>; + bits = <0 8>; + }; + }; + rng: rng@793000 { compatible = "qcom,prng-ee"; reg = <0 0x00793000 0 0x1000>;