From patchwork Fri Feb 24 10:58:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 657289 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4C9CCC6FA8E for ; Fri, 24 Feb 2023 11:00:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230165AbjBXLAn (ORCPT ); Fri, 24 Feb 2023 06:00:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33848 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229873AbjBXLAC (ORCPT ); Fri, 24 Feb 2023 06:00:02 -0500 Received: from mail-pj1-x1029.google.com (mail-pj1-x1029.google.com [IPv6:2607:f8b0:4864:20::1029]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D52E83CE08 for ; Fri, 24 Feb 2023 02:59:34 -0800 (PST) Received: by mail-pj1-x1029.google.com with SMTP id u10so16085232pjc.5 for ; Fri, 24 Feb 2023 02:59:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=VslRr6K7dtSVjJZa6fQapZMGTntHaQJdO/Shpvvg0kE=; b=MGOUmbwJgUA1fRVJZwgB9pWpXSaFDZdqmuK/QbXECACx5ema5PaJeJLtueCdGflZWD +iVRSxClMuj4nGtJLHvDdO6Q9QcpOyBQab03jB0Fi5EH6oBo+cTRex1svC3RQpI+FRtV BwH7n/u/g0zlgDqs4+hnb1sz43b7+alo7Vf5gHBXbYBFt16snBeALQccZPXSGxIN3P57 skmZO/QNwavAugcQZXxwYqr5tLJYtgeN6XJ+z9GhF8WX+UQlzPkAUzLzaXLM9qk3nTRx WeXHm0rRlwL93rLX51fJGDc1bj26EJS8vetwl82uGpYQh17dTbTGfQr59idAdiPKpg+d Jzfg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VslRr6K7dtSVjJZa6fQapZMGTntHaQJdO/Shpvvg0kE=; b=qrWVEpGkMjhXvDiM7CcyO4NKHaeZd9ntQd7YnK5mKuDhClgZYarLqIx2Ol2WvJEx4G B/RiZ0TH4UglbCiuV1e0i7tW4FStTc43HSdFlxE5TWtOisp/DiQsnf69f9/NNXIJBHJg tC6JgA0Q+CQt9DQR12qVfvc+IRWua9E/lVOqOxxnCMDrz3GVN1taB2gv/nKxIpnZWDzY lT7FUQn1t6eUWvhwpnJvfRBW5JsRxCf71WU2tQWOymzN8bbohIoFoItasfcB3CupuqIt qAdvLIig0ea/tK+4uNrRND6TdAkiuozlFWq5lYNRKtRLte1mqMFQv/Sa43z47Rw3Butp LagQ== X-Gm-Message-State: AO0yUKU99HuAV5RPiOCmeMgklQSPGAWsGlG3pJpn3uljlMD/dNgZn5DK 2vZtAM/5A6iZrXXihNV/76ac X-Google-Smtp-Source: AK7set+r4n315Ty6V+j5fxdDXOFOvEcth9W92yPHLkj3kMcik/XkG7t/jrX6t5of1AEnZduZqIlfgA== X-Received: by 2002:a17:90a:57:b0:237:161d:f5ac with SMTP id 23-20020a17090a005700b00237161df5acmr13869044pjb.36.1677236374349; Fri, 24 Feb 2023 02:59:34 -0800 (PST) Received: from localhost.localdomain ([117.217.187.3]) by smtp.gmail.com with ESMTPSA id gd5-20020a17090b0fc500b00233cde36909sm1263853pjb.21.2023.02.24.02.59.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Feb 2023 02:59:34 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, lpieralisi@kernel.org, robh@kernel.org, kw@linux.com, krzysztof.kozlowski+dt@linaro.org, vkoul@kernel.org Cc: konrad.dybcio@linaro.org, bhelgaas@google.com, kishon@kernel.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v2 04/13] dt-bindings: PCI: qcom-ep: Fix the unit address used in example Date: Fri, 24 Feb 2023 16:28:57 +0530 Message-Id: <20230224105906.16540-5-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230224105906.16540-1-manivannan.sadhasivam@linaro.org> References: <20230224105906.16540-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Unit address of PCIe EP node should be 0x1c00000 as it has to match the first address specified in the reg property. Fixes: 31c9ef002580 ("dt-bindings: PCI: Add Qualcomm PCIe Endpoint controller") Reviewed-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam --- Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml index 8d7eb51edcb4..c1800e44f3da 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml @@ -164,7 +164,7 @@ examples: #include #include #include - pcie_ep: pcie-ep@40000000 { + pcie_ep: pcie-ep@1c00000 { compatible = "qcom,sdx55-pcie-ep"; reg = <0x01c00000 0x3000>, <0x40000000 0xf1d>,