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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id v9-20020a170906338900b0094ee99eeb01sm4209935eja.150.2023.05.11.09.30.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 May 2023 09:30:07 -0700 (PDT) From: Alexandre Mergnat Date: Thu, 11 May 2023 18:29:28 +0200 Subject: [PATCH v7 08/11] arm64: dts: mediatek: add ethernet support for mt8365-evk MIME-Version: 1.0 Message-Id: <20230203-evk-board-support-v7-8-98cbdfac656e@baylibre.com> References: <20230203-evk-board-support-v7-0-98cbdfac656e@baylibre.com> In-Reply-To: <20230203-evk-board-support-v7-0-98cbdfac656e@baylibre.com> To: Catalin Marinas , Will Deacon , Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Conor Dooley Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org, Alexandre Mergnat , Kevin Hilman X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2481; i=amergnat@baylibre.com; h=from:subject:message-id; bh=DjSelAdOZMPlRnOCXsPOw3j7Znol7iZuqfSQhuv0e3s=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkXRgEuL8tv3XPLNCTsvVZGVz70gDf4DdWTusQ0f+3 BOJz1S2JAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZF0YBAAKCRArRkmdfjHUReCTEA CVmdX4q5lT6YXJzs7Qovo3u+IuaMF0ggKWFjpMDAFkBMXStBzEHV/8fBa3nnqVa7pgBHUiBC/3QbVi VV293B6g1r7bwPzN8mWb8R1YoBGz07J/rqY11LN4ERJ3UOBixaluzeMm7m6Y16uQowwl6/zCo3Uwrj kXomWO6tBUhZf20vFizrvtCfyhwZV26FANwI4P24Euk7AVFMHnjEosrwuOonrnZbbwx7O2oeKJJ+w1 XGH9HMvNXZRbIdhGQvNHuCDTlvd3pmS/uteI+dSKLki7K4wO5Gj2oOCHKN0vSRn4TCNzMQEckuHaZE jknzCGG2D98waFluNfPRw2EY+yMFLgFXmp7UCWKzjOdrVOWAcqEm0XM8SZqBgQZ7RI0T8PHwTjf+iu 8LTrJlLYmN+SShm70bGm21ElMzRete1jFfu33/JGE3S9yWzO8MedI5GMdB0bfVilPoQ40sk8NwlILs Q41DeTb2YIm0ocLdj3+eiIj2RJRFJlfuS9kOdn8jBbT7UQQYF5nSZwqWFbc6XVZz5Y1l3WsxEI3ycm zsbiABuo/3Fc2v+nuSiDJNYV+E886U9tvBLYdGHFXWisVkLPKSZMzmXrNHhbZd7bblD/AkXNwPPtFH 9D3/i8xpOWb5GLcaqs53ryDDye4bIwk2Hf9/uNANKshVaNDy5O5jjTdpvM9Q== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org - Enable "vibr" and "vsim2" regulators to power the ethernet chip. Tested-by: Kevin Hilman Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 57 +++++++++++++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts index 3a472f620ac0..cf81dace466a 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts +++ b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts @@ -88,6 +88,28 @@ optee_reserved: optee@43200000 { }; }; +ðernet { + pinctrl-0 = <ðernet_pins>; + pinctrl-names = "default"; + phy-handle = <ð_phy>; + phy-mode = "rmii"; + /* + * Ethernet and HDMI (DSI0) are sharing pins. + * Only one can be enabled at a time and require the physical switch + * SW2101 to be set on LAN position + */ + status = "disabled"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + eth_phy: ethernet-phy@0 { + reg = <0>; + }; + }; +}; + &i2c0 { clock-frequency = <100000>; pinctrl-0 = <&i2c0_pins>; @@ -137,12 +159,47 @@ &mt6357_pmic { #interrupt-cells = <2>; }; +/* Needed by analog switch (multiplexer), HDMI and ethernet */ +&mt6357_vibr_reg { + regulator-always-on; +}; + /* Needed by MSDC IP */ &mt6357_vmc_reg { regulator-always-on; }; +/* Needed by ethernet */ +&mt6357_vsim2_reg { + regulator-always-on; +}; + &pio { + ethernet_pins: ethernet-pins { + phy_reset_pins { + pinmux = ; + }; + + rmii_pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + }; + gpio_keys: gpio-keys-pins { pins { pinmux = ;