From patchwork Thu Jan 26 13:14:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 648265 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 88C9DC54E94 for ; Thu, 26 Jan 2023 13:14:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236676AbjAZNO5 (ORCPT ); Thu, 26 Jan 2023 08:14:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50300 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236419AbjAZNOv (ORCPT ); Thu, 26 Jan 2023 08:14:51 -0500 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [IPv6:2a00:1450:4864:20::32a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 91D6A611C9 for ; Thu, 26 Jan 2023 05:14:27 -0800 (PST) Received: by mail-wm1-x32a.google.com with SMTP id f25-20020a1c6a19000000b003da221fbf48so1096011wmc.1 for ; Thu, 26 Jan 2023 05:14:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=L8S/k5EZmNceNC6Mb6iquS22SFOybuz/c5edVTjpSWQ=; b=jbUFuQbr46utCUyThNoFkNjZt0H9yAQO8Dsi5ZT1Oz4vwUbod+B+DYeXw1mMuIW8yk 2T2KB525Cb1YDINUCh1d/8VpAggbNU2f7sjpKNV+3Zcdio4kcojcA5ByVaUI9svZtYH/ JR4aoPaqYDP9qgM3n4YToJywCnVh8ki3bhQte/sZrcVMf7dAe9AlrGFJ+VfKGq+p9o3k 7artgLWuj85uQVV1G6GRsE6x4PSxQrXs79hOWX0cu3A04xAyYccVP8n0gSaow9WXZFVK x0r0iuznEfWpAC9govDHAET72/UDWqBSHF4fAMaWR5xvZPcJBRDBnatQ8hjoB7+efUDp Sd7A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=L8S/k5EZmNceNC6Mb6iquS22SFOybuz/c5edVTjpSWQ=; b=O5xW8cFb/zdyCDJcozDAmj7bTGdgACxXrsSIXFavAyDZ484h9bWMVi5mvb8DnVqUOD PUwrskF9GhrI/VnnkXUzryK6CWADliB52umDt0EqDKVvT4E+zmmk+sgv//LFy7fD+cZj pgesNkwXHhTwUsEGtifZwVxOk59drbXshNTX8/7RDTWfhb+FhK1PkEPVcVe3j5NEb643 zT9HBuHjeva5fsm0r8r3uGlbrUI3W87nhYJTlHm1AoqrmIYj2+34hnlNZv7Qyc68fQpr 0ik7JX4vRJLqNLsYuo827CKuAeNyTMrey4H1MtsPEGRVME0kQUudZwuGrboIrRCI3tgc zmJg== X-Gm-Message-State: AO0yUKUBZBMjEF1K6+5hrwMbGXiq8eBCxvKxl/ZwLQOR6mR3lDPjj7Vr gqEAMLQX4cSwOCITLqSy4n44YA== X-Google-Smtp-Source: AK7set9Mipn93fBan5Mm1jnzFa/ECppqiDj0Cy/gwDUPPO3En4NlVsc+jfJJDQwJX7brzeHc8Ky7+w== X-Received: by 2002:a05:600c:a42:b0:3dc:1050:5553 with SMTP id c2-20020a05600c0a4200b003dc10505553mr9772874wmq.23.1674738865812; Thu, 26 Jan 2023 05:14:25 -0800 (PST) Received: from hackbox.lan ([94.52.112.99]) by smtp.gmail.com with ESMTPSA id 18-20020a05600c26d200b003da28dfdedcsm1719804wmv.5.2023.01.26.05.14.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Jan 2023 05:14:25 -0800 (PST) From: Abel Vesa To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , "vkoul@kernel.org" , Kishon Vijay Abraham I , Philipp Zabel Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Linux Kernel Mailing List , linux-phy@lists.infradead.org Subject: [PATCH v3 5/8] phy: qcom-qmp: Add v6 DP register offsets Date: Thu, 26 Jan 2023 15:14:12 +0200 Message-Id: <20230126131415.1453741-6-abel.vesa@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230126131415.1453741-1-abel.vesa@linaro.org> References: <20230126131415.1453741-1-abel.vesa@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The new SM8550 SoC bumps up the HW version of QMP phy to v6. Add the new DP specific offsets in the generic qmp header file. Signed-off-by: Abel Vesa --- The v2 version of this patch was here: https://lore.kernel.org/all/20230126124651.1362533-6-abel.vesa@linaro.org/ Changes since v2: * none This patch did not exist in v1. Since then, the DP support has been added. drivers/phy/qualcomm/phy-qcom-qmp.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.h b/drivers/phy/qualcomm/phy-qcom-qmp.h index 148663ee713a..7ee4b0e07d11 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.h +++ b/drivers/phy/qualcomm/phy-qcom-qmp.h @@ -134,4 +134,8 @@ #define QPHY_V4_PCS_MISC_TYPEC_STATUS 0x10 #define QPHY_V4_PCS_MISC_PLACEHOLDER_STATUS 0x14 +/* Only for QMP V6 PHY - DP PHY registers */ +#define QSERDES_V6_DP_PHY_AUX_INTERRUPT_STATUS 0x0e0 +#define QSERDES_V6_DP_PHY_STATUS 0x0e4 + #endif