From patchwork Mon Jan 16 17:51:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 643175 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6D1EBC54EBE for ; Mon, 16 Jan 2023 18:06:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232984AbjAPSF7 (ORCPT ); Mon, 16 Jan 2023 13:05:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47112 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232302AbjAPSFV (ORCPT ); Mon, 16 Jan 2023 13:05:21 -0500 Received: from mail-ed1-x536.google.com (mail-ed1-x536.google.com [IPv6:2a00:1450:4864:20::536]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6E87A360B0 for ; Mon, 16 Jan 2023 09:52:08 -0800 (PST) Received: by mail-ed1-x536.google.com with SMTP id v10so40483344edi.8 for ; Mon, 16 Jan 2023 09:52:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Kod5siM2bcM+dDVpz/GqL4BGUBIqfHoecSZkZ5xWujI=; b=atn/yL9aYqCqIVAt/lTz3zyQdiLguZ46x02s5JJjy4KWUlwgj+mlPmlbffUKNQ07lw ffqZpcUBGxrdpJBIH+2rogWZf6lex8s8Nhp+FJCNv5wVLmyq2GDiLAXd4YCZf7X1NMRH AP4SUP4QQwK2/QBITwDHCXuJkVXJhIdEdo150= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Kod5siM2bcM+dDVpz/GqL4BGUBIqfHoecSZkZ5xWujI=; b=Y43ptn6A1/t00mXuKIUE8UnWzPSH5sgXO45AVcSow8+ydoC8TzHYEbFTRaXGxoQUWB 9O5iZ/n5QpXTiqDO6172XfVKNCeWTSpUlAn8+hIJfjcvsansBmYF+zQ+1wr3DSguiTBv V9sZLfe1vPYTuQ8mViy6ig7mtdrFvUs6KiFra56hKd7vYP2HG58SPGaUXNils+syE369 8IORqp8Oq0Ap5vOAOvEuD/S7rhNcgLRUd/NxCKXeKwhdL+l1cjw/566R69npPcckYa5B J6Qc+F0+upEvosSf4tsQYs0TpbcrepLfwJGf3E5eVh15YHrm3xKzbWWLYYkSYQiUjGcd c/1g== X-Gm-Message-State: AFqh2koiC4THdjaQOhfYySCm1mTeT1YohAD1OoQFrqQhnd89CM6iZcJP JnddM8PyKcNt0ixHazVmpIT84A== X-Google-Smtp-Source: AMrXdXv1Zyt6i+r4onf48ykCmvbF8MjXUJfj270t6n6IGqxzIfbrrU/jTeOuE+smT6vO5tue0TpDcg== X-Received: by 2002:a05:6402:2208:b0:49d:57:f538 with SMTP id cq8-20020a056402220800b0049d0057f538mr104114edb.15.1673891528058; Mon, 16 Jan 2023 09:52:08 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.. (mob-5-90-75-145.net.vodafone.it. [5.90.75.145]) by smtp.gmail.com with ESMTPSA id fd7-20020a056402388700b00483dd234ac6sm11490723edb.96.2023.01.16.09.52.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Jan 2023 09:52:07 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Vincent Mailhol , Amarula patchwork , Krzysztof Kozlowski , michael@amarulasolutions.com, Rob Herring , Alexandre Torgue , Marc Kleine-Budde , Dario Binacchi , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Krzysztof Kozlowski , Maxime Coquelin , Paolo Abeni , Rob Herring , Wolfgang Grandegger , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-can@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, netdev@vger.kernel.org Subject: [PATCH v7 2/5] dt-bindings: net: can: add STM32 bxcan DT bindings Date: Mon, 16 Jan 2023 18:51:49 +0100 Message-Id: <20230116175152.2839455-3-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20230116175152.2839455-1-dario.binacchi@amarulasolutions.com> References: <20230116175152.2839455-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add documentation of device tree bindings for the STM32 basic extended CAN (bxcan) controller. Signed-off-by: Dario Binacchi Reviewed-by: Rob Herring --- (no changes since v5) Changes in v5: - Add Rob Herring's Reviewed-by tag. Changes in v4: - Remove "st,stm32f4-bxcan-core" compatible. In this way the can nodes (compatible "st,stm32f4-bxcan") are no longer children of a parent node with compatible "st,stm32f4-bxcan-core". - Add the "st,gcan" property (global can memory) to can nodes which references a "syscon" node containing the shared clock and memory addresses. Changes in v3: - Remove 'Dario Binacchi ' SOB. - Add description to the parent of the two child nodes. - Move "patterProperties:" after "properties: in top level before "required". - Add "clocks" to the "required:" list of the child nodes. Changes in v2: - Change the file name into 'st,stm32-bxcan-core.yaml'. - Rename compatibles: - st,stm32-bxcan-core -> st,stm32f4-bxcan-core - st,stm32-bxcan -> st,stm32f4-bxcan - Rename master property to st,can-master. - Remove the status property from the example. - Put the node child properties as required. .../bindings/net/can/st,stm32-bxcan.yaml | 83 +++++++++++++++++++ 1 file changed, 83 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml diff --git a/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml new file mode 100644 index 000000000000..c9194345d202 --- /dev/null +++ b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/can/st,stm32-bxcan.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics bxCAN controller + +description: STMicroelectronics BxCAN controller for CAN bus + +maintainers: + - Dario Binacchi + +allOf: + - $ref: can-controller.yaml# + +properties: + compatible: + enum: + - st,stm32f4-bxcan + + st,can-master: + description: + Master and slave mode of the bxCAN peripheral is only relevant + if the chip has two CAN peripherals. In that case they share + some of the required logic. + type: boolean + + reg: + maxItems: 1 + + interrupts: + items: + - description: transmit interrupt + - description: FIFO 0 receive interrupt + - description: FIFO 1 receive interrupt + - description: status change error interrupt + + interrupt-names: + items: + - const: tx + - const: rx0 + - const: rx1 + - const: sce + + resets: + maxItems: 1 + + clocks: + maxItems: 1 + + st,gcan: + $ref: "/schemas/types.yaml#/definitions/phandle-array" + description: + The phandle to the gcan node which allows to access the 512-bytes + SRAM memory shared by the two bxCAN cells (CAN1 master and CAN2 + slave) in dual CAN peripheral configuration. + +required: + - compatible + - reg + - interrupts + - resets + - clocks + - st,gcan + +additionalProperties: false + +examples: + - | + #include + #include + + can1: can@40006400 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40006400 0x200>; + interrupts = <19>, <20>, <21>, <22>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F4_APB1_RESET(CAN1)>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>; + st,can-master; + st,gcan = <&gcan>; + };