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[v1,1/2] ARM: dts: meson8: Add more L2 (PL310) cache properties

Message ID 20230114233455.2005047-2-martin.blumenstingl@googlemail.com
State Superseded
Headers show
Series ARM: dts: meson: Add more L2 (PL310) cache properties | expand

Commit Message

Martin Blumenstingl Jan. 14, 2023, 11:34 p.m. UTC
Add more L2 cache properties which are used by the 3.10 vendor kernel
but have not made it upstream yet.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 arch/arm/boot/dts/meson8.dtsi | 3 +++
 1 file changed, 3 insertions(+)
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Patch

diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi
index 0f8bac8bac8b..a86f6afb8f87 100644
--- a/arch/arm/boot/dts/meson8.dtsi
+++ b/arch/arm/boot/dts/meson8.dtsi
@@ -651,6 +651,9 @@  &L2 {
 	arm,filter-ranges = <0x100000 0xc0000000>;
 	prefetch-data = <1>;
 	prefetch-instr = <1>;
+	arm,prefetch-offset = <7>;
+	arm,double-linefill = <1>;
+	arm,prefetch-drop = <1>;
 	arm,shared-override;
 };