From patchwork Wed Jan 11 20:01:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 641396 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F29BFC46467 for ; Wed, 11 Jan 2023 20:05:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235351AbjAKUFs (ORCPT ); Wed, 11 Jan 2023 15:05:48 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35288 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239487AbjAKUFJ (ORCPT ); Wed, 11 Jan 2023 15:05:09 -0500 Received: from mail-lf1-x12a.google.com (mail-lf1-x12a.google.com [IPv6:2a00:1450:4864:20::12a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BC20343E55 for ; Wed, 11 Jan 2023 12:01:37 -0800 (PST) Received: by mail-lf1-x12a.google.com with SMTP id bf43so25213525lfb.6 for ; Wed, 11 Jan 2023 12:01:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PZ2p731vN2U20cHBeIyCq9fuCWOHPzhzPfBzUh6W44Y=; b=BzwdXy4C9+bn81/EMPx5hzqqsRMLi0MPIGDUeJh7FCpmLthigreTIKQXXFbAtktRj/ gkoJA5UFMcbFWRI98EPgN1eYwJXhS84nT7aNE+6zFpdlSee4DxE8VLa9lo518CfyGT8Z oDCKBYB4lEHTpfvailV+UfJNXTCh146iU4TY4dzxueU/p5CB5WmHTe7YKbUs/UsBIxI/ ecpxs/ft4ACZGM0uLcl+ob3HccwUVSv5NnJL8M+d6j5bTzp6PLOxJ71Gm/z2Q99Ls9lK zijUtOpatBZWB95eTVaA9GUIMDz3HtEX9bbh8mSs7/iV/cGdX0DSU7iBbULf4EJzOn2o FqXg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PZ2p731vN2U20cHBeIyCq9fuCWOHPzhzPfBzUh6W44Y=; b=zyxXzduunsoANYkxxyYypFV1LjsyRhicDzvajVIZVnDnRu8GWqX1mBj0jWZEVOqqeK fFzxlTkOpA5sXwLSfi9Z7njlK1ifC/s4mEwCE6e/WEW0zoZ70k1KxOTNwoeomc9Pn1Du /kkPwuG0Sw/C7DwT1a3lkvmvO6JGY13TyR3YwjbbE/sV1yn9Oa0IfhpSo86bN97DsIXs qE0lD7kv9JCNRumI2c+caLxt2VeTvVYi01QNJ0Oe/pu4Vi600GB22Izcuoj8wWpEZJJB xOEDj6zY2kfSuPhqhHwldTKUbGqLgIVjBwoy+EqiBFCLccYeBHKPXT+7eIItNZaDtGg4 7sPg== X-Gm-Message-State: AFqh2krEtWucUdpoMIcWgPYryrgq0JIBmhHWad18FYPN7HRPgTVcYkAZ hskntB+YFJNSzzY8V7HEnMSdAw== X-Google-Smtp-Source: AMrXdXtmdILMytzI+t7hWZ5YNBsJKVeYJhVtY7573QiGBxYXcEk2jq/CeA1tcJbg7MTriIqD+/xnSA== X-Received: by 2002:a05:6512:3b2a:b0:4b5:5efb:7d26 with SMTP id f42-20020a0565123b2a00b004b55efb7d26mr25667474lfv.37.1673467296024; Wed, 11 Jan 2023 12:01:36 -0800 (PST) Received: from umbar.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id v20-20020a05651203b400b004b4e6dab30esm2881437lfp.222.2023.01.11.12.01.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Jan 2023 12:01:35 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 10/14] clk: qcom: cpu-8996: fix PLL configuration sequence Date: Wed, 11 Jan 2023 23:01:24 +0300 Message-Id: <20230111200128.2593359-11-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230111200128.2593359-1-dmitry.baryshkov@linaro.org> References: <20230111200128.2593359-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Switch both power and performance clocks to the GPLL0/2 (sys_apcs_aux) before PLL configuration. Switch them to the ACD afterwards. Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/clk-cpu-8996.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-8996.c index 571ed52b3026..47c58bb5f21a 100644 --- a/drivers/clk/qcom/clk-cpu-8996.c +++ b/drivers/clk/qcom/clk-cpu-8996.c @@ -432,13 +432,27 @@ static int qcom_cpu_clk_msm8996_register_clks(struct device *dev, { int i, ret; + /* Select GPLL0 for 300MHz for the both clusters */ + regmap_write(regmap, PERFCL_REG_OFFSET + MUX_OFFSET, 0xc); + regmap_write(regmap, PWRCL_REG_OFFSET + MUX_OFFSET, 0xc); + + /* Ensure write goes through before PLLs are reconfigured */ + udelay(5); + clk_alpha_pll_configure(&pwrcl_pll, regmap, &hfpll_config); clk_alpha_pll_configure(&perfcl_pll, regmap, &hfpll_config); clk_alpha_pll_configure(&pwrcl_alt_pll, regmap, &altpll_config); clk_alpha_pll_configure(&perfcl_alt_pll, regmap, &altpll_config); + /* Wait for PLL(s) to lock */ + udelay(50); + qcom_cpu_clk_msm8996_acd_init(regmap); + /* Switch clusters to use the ACD leg */ + regmap_write(regmap, PWRCL_REG_OFFSET + MUX_OFFSET, 0x2); + regmap_write(regmap, PERFCL_REG_OFFSET + MUX_OFFSET, 0x2); + for (i = 0; i < ARRAY_SIZE(cpu_msm8996_hw_clks); i++) { ret = devm_clk_hw_register(dev, cpu_msm8996_hw_clks[i]); if (ret)