From patchwork Thu Jan 5 13:41:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 639475 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AFD09C3DA7A for ; Thu, 5 Jan 2023 13:42:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231823AbjAENmS (ORCPT ); Thu, 5 Jan 2023 08:42:18 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57514 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232614AbjAENlq (ORCPT ); Thu, 5 Jan 2023 08:41:46 -0500 Received: from mail-lf1-x133.google.com (mail-lf1-x133.google.com [IPv6:2a00:1450:4864:20::133]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2D2FA32E98 for ; Thu, 5 Jan 2023 05:41:44 -0800 (PST) Received: by mail-lf1-x133.google.com with SMTP id b3so55085245lfv.2 for ; Thu, 05 Jan 2023 05:41:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=kKkWqN5cimdLBNmps+85gop0wy/2yT2a83j/RNY11uo=; b=jrcYs+tOCxNZRvvhpNG2OPoHZ2GOUWgp3IgaRM0dMlGzdFN3RqkZcy60u0s8yrV+cc 8C17j2SukFEZVlXfvDHIfEcsm+Pfe1Q26gzOITk3e6MCn+8lcJC3yTQW2vKIx/w7YEiw Daxbnu2exBSDIQ/c0rssgT2Rs31jQZ0JgVzscXjWc7pJKlC+4Ad4NfeaeHKOm+WusCw2 kuvGinLQhz/2yzSxK2SMfWWqKR82vwe3HJ9ps4VxBrzWSbwI7IWBN19hAM0LJDTuqvDX yMO8tLr4+CHZYa45oATA8eAo4++5rWtiJnhYeOEt0tXTbunpuSX52IXqjhWq/XcPuRAV A4dw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=kKkWqN5cimdLBNmps+85gop0wy/2yT2a83j/RNY11uo=; b=D2NvmC9VlFhJqDY2gvKQofz1bXCG5zK1KGBRcK5580JXDEdBVHVaooiSKLLl6kuK+w poC1fmgUQWjteWD09afUUIr0n83/nNfk2bOe6kVI3K/ckBNIHZfmIDLgu9sIzNn4Lam2 X3A4N+mEKmaxkKXlUKDX7nuONmSXfRgYLdXwQaOOiARE5DhGSBsXH+HFiVcVZNMAwxbw gts4hAMsYB2RuLqaB9nZDnkG/6RZ2GLpDsMLFo14cwidM8rEhwjSucipuOY5UVYDcjYz uYVEt66nWue7Kgj2uUbM/sr0vlJCb20e6EmkSRc1uf0BmLFfX9KIXG5fmBoGTri7h8Yn 61Rw== X-Gm-Message-State: AFqh2kqd6sEzthezjIjDOvt4p7mGHIW+nHCvNhQ9epPhAvo7Uplr27pl vugSPALhn1pafXfvNEJUX1KnGw== X-Google-Smtp-Source: AMrXdXsQuQyQqff2t3pFvSjqnltFwC5lR3TRbkt4U0zZ7cFSUuO8CkXnYraDehtDV4fa/68moHarvg== X-Received: by 2002:a05:6512:1383:b0:4b6:ed8b:4f11 with SMTP id p3-20020a056512138300b004b6ed8b4f11mr17475458lfa.53.1672926103730; Thu, 05 Jan 2023 05:41:43 -0800 (PST) Received: from eriador.lan (dzccz6yyyyyyyyyyybcwt-3.rev.dnainternet.fi. [2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id bq25-20020a056512151900b004b592043413sm5461315lfb.12.2023.01.05.05.41.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 05:41:43 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 12/12] ARM: dts: qcom: apq8084: add clocks and clock-names to gcc device Date: Thu, 5 Jan 2023 15:41:33 +0200 Message-Id: <20230105134133.1550618-13-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105134133.1550618-1-dmitry.baryshkov@linaro.org> References: <20230105134133.1550618-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add clocks and clock-names nodes to the gcc device to bind clocks using the DT links. Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov --- arch/arm/boot/dts/qcom-apq8084.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi index 4b0d2b4f4b6a..4d01f0f2292e 100644 --- a/arch/arm/boot/dts/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi @@ -388,6 +388,24 @@ gcc: clock-controller@fc400000 { #reset-cells = <1>; #power-domain-cells = <1>; reg = <0xfc400000 0x4000>; + clocks = <&xo_board>, + <&sleep_clk>, + <0>, /* ufs */ + <0>, + <0>, + <0>, + <0>, /* sata */ + <0>, + <0>; /* pcie */ + clock-names = "xo", + "sleep_clk", + "ufs_rx_symbol_0_clk_src", + "ufs_rx_symbol_1_clk_src", + "ufs_tx_symbol_0_clk_src", + "ufs_tx_symbol_1_clk_src", + "sata_asic0_clk", + "sata_rx_clk", + "pcie_pipe"; }; tcsr_mutex: hwlock@fd484000 {