From patchwork Fri Dec 30 15:35:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Foss X-Patchwork-Id: 638255 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1EF49C3DA7D for ; Fri, 30 Dec 2022 15:37:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235215AbiL3PhK (ORCPT ); Fri, 30 Dec 2022 10:37:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49032 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235018AbiL3Pgd (ORCPT ); Fri, 30 Dec 2022 10:36:33 -0500 Received: from mail-wm1-x32d.google.com (mail-wm1-x32d.google.com [IPv6:2a00:1450:4864:20::32d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D6A721C122 for ; Fri, 30 Dec 2022 07:36:20 -0800 (PST) Received: by mail-wm1-x32d.google.com with SMTP id ja17so15380819wmb.3 for ; Fri, 30 Dec 2022 07:36:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=ctxOvK28D28f3o6Pe3qUkH7ZxEJEHxVrpCcUg+NUh04=; b=g+KWhYGJxl7BWHkPVNQW1thWA8kAFGFXKPDHOZ373tFmfHrrrPrIE8mDNU+pEvbUcv sYbdVvT4u8d+m/kCUGSTSPZsQvC4+rrnz6+zgo+346ucE9ZCvb/Wx3BHgmR92wKGPbmi T9oHmoYYv3xuSLBhnj1fxSNfm4vVXAFA2EG6KHsA5TKAo5ifpHxLny4+OExRO6+uUwXJ g5T18A0HRPaIxiNXHMIaIrcovFujD0egizRlMXz6MTMPwMy9FQhJvlyxMmkiIxEx+sBS 2BnoQnguqkD7JYL3lq4S4xSpGPaW/fkXLLIbdC3L7QDhqaBbrEf8dYHKOhPgJUwEykwA Z0kw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ctxOvK28D28f3o6Pe3qUkH7ZxEJEHxVrpCcUg+NUh04=; b=nGhLDoPkcSftrWTQM+Q6aqHfDNw3D3lWT07M5PdQHjgT4Z3UwQQjnMqRiTN23PV5Dy JA8B+RLSkOG3KzJfEtvFR+d51moyz5lSxuyyi/M7auBkjMauksMjxr/hImnXYifuHtoU Mdyuae2CiBIa+M+mD1jq5gCU1s0r3BGR/eJysUOgdypcoY6FhVOyLrmQYEXrl3ojz03f 6ROSEPrUGny4NR7kgJCD/pP2+CIcM7j3ATefrQ+SkUcv/Ae4YJFsWqHUw/jZIp5TB0Id dKvwt6OzXpYELGREQrzsg6yaraSqnxZpWwNngzBsQzw8tHuPAN5pFUNzy84+4ZsXOWsX lwQw== X-Gm-Message-State: AFqh2koxKChpz778CMLq851FhaF6QBfRsNmj1bsvJFFmdRT/74VcLfbH GaAnv8a18viskKai86CVEa3zAQ== X-Google-Smtp-Source: AMrXdXupiR1KHz1rC6eEmvSjNUuoXVux4kIV6jTnI6HXoz6vZWYwnghGJbUlafDEiY/R85jV3v2VKw== X-Received: by 2002:a05:600c:4995:b0:3d3:4f43:fbc2 with SMTP id h21-20020a05600c499500b003d34f43fbc2mr23117665wmp.41.1672414580409; Fri, 30 Dec 2022 07:36:20 -0800 (PST) Received: from prec5560.. (freifunk-gw.bsa1-cpe1.syseleven.net. [176.74.57.43]) by smtp.gmail.com with ESMTPSA id l42-20020a05600c1d2a00b003cfbbd54178sm49857993wms.2.2022.12.30.07.36.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Dec 2022 07:36:20 -0800 (PST) From: Robert Foss To: robdclark@gmail.com, quic_abhinavk@quicinc.com, dmitry.baryshkov@linaro.org, sean@poorly.run, airlied@gmail.com, daniel@ffwll.ch, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, agross@kernel.org, andersson@kernel.org, konrad.dybcio@somainline.org, quic_jesszhan@quicinc.com, robert.foss@linaro.org, angelogioacchino.delregno@somainline.org, loic.poulain@linaro.org, vkoul@kernel.org, a39.skl@gmail.com, quic_khsieh@quicinc.com, quic_vpolimer@quicinc.com, swboyd@chromium.org, dianders@chromium.org, liushixin2@huawei.com, linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Jonathan Marek , vinod.koul@linaro.org Subject: [PATCH v4 11/11] arm64: dts: qcom: sm8350-hdk: Enable lt9611uxc dsi-hdmi bridge Date: Fri, 30 Dec 2022 16:35:54 +0100 Message-Id: <20221230153554.105856-12-robert.foss@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230153554.105856-1-robert.foss@linaro.org> References: <20221230153554.105856-1-robert.foss@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The sm8350-hdk ships with the LT9611 UXC DSI/HDMI bridge chip. In order to toggle the board to enable the HDMI output, switch #7 & #8 on the rightmost multi-switch package have to be toggled to On. Signed-off-by: Robert Foss Reviewed-by: Jessica Zhang Tested-by: Jessica Zhang #SM8350 (HDK) --- arch/arm64/boot/dts/qcom/sm8350-hdk.dts | 105 ++++++++++++++++++++++++ 1 file changed, 105 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts b/arch/arm64/boot/dts/qcom/sm8350-hdk.dts index 1961f941ff83..6b21897c92dc 100644 --- a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts +++ b/arch/arm64/boot/dts/qcom/sm8350-hdk.dts @@ -20,6 +20,17 @@ chosen { stdout-path = "serial0:115200n8"; }; + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con: endpoint { + remote-endpoint = <<9611_out>; + }; + }; + }; + vph_pwr: vph-pwr-regulator { compatible = "regulator-fixed"; regulator-name = "vph_pwr"; @@ -29,6 +40,31 @@ vph_pwr: vph-pwr-regulator { regulator-always-on; regulator-boot-on; }; + + lt9611_1v2: lt9611-1v2-regulator { + compatible = "regulator-fixed"; + regulator-name = "LT9611_1V2"; + + vin-supply = <&vph_pwr>; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + gpio = <&tlmm 49 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + }; + + lt9611_3v3: lt9611-3v3-regulator { + compatible = "regulator-fixed"; + regulator-name = "LT9611_3V3"; + + vin-supply = <&vreg_bob>; + gpio = <&tlmm 47 GPIO_ACTIVE_HIGH>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + regulator-boot-on; + regulator-always-on; + }; }; &adsp { @@ -220,6 +256,15 @@ &dispcc { &mdss_dsi0 { vdda-supply = <&vreg_l6b_1p2>; status = "okay"; + + ports { + port@1 { + endpoint { + remote-endpoint = <<9611_a>; + data-lanes = <0 1 2 3>; + }; + }; + }; }; &mdss_dsi0_phy { @@ -231,6 +276,46 @@ &gpi_dma1 { status = "okay"; }; +&i2c15 { + clock-frequency = <400000>; + status = "okay"; + + lt9611_codec: hdmi-bridge@2b { + compatible = "lontium,lt9611uxc"; + reg = <0x2b>; + + interrupts-extended = <&tlmm 50 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>; + + vdd-supply = <<9611_1v2>; + vcc-supply = <<9611_3v3>; + + pinctrl-names = "default"; + pinctrl-0 = <<9611_state>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + lt9611_a: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + + port@2 { + reg = <2>; + + lt9611_out: endpoint { + remote-endpoint = <&hdmi_con>; + }; + }; + }; + }; +}; + &mdss { status = "okay"; }; @@ -248,6 +333,10 @@ &qupv3_id_0 { status = "okay"; }; +&qupv3_id_2 { + status = "okay"; +}; + &slpi { status = "okay"; firmware-name = "qcom/sm8350/slpi.mbn"; @@ -544,4 +633,20 @@ usb_hub_enabled_state: usb-hub-enabled-state { drive-strength = <2>; output-low; }; + + lt9611_state: lt9611-state { + rst { + pins = "gpio48"; + function = "normal"; + + output-high; + input-disable; + }; + + irq { + pins = "gpio50"; + function = "gpio"; + bias-disable; + }; + }; };