From patchwork Tue Dec 27 11:58:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Qiu X-Patchwork-Id: 637410 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0DBC1C4332F for ; Tue, 27 Dec 2022 11:59:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231919AbiL0L7m convert rfc822-to-8bit (ORCPT ); Tue, 27 Dec 2022 06:59:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44418 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232035AbiL0L7N (ORCPT ); Tue, 27 Dec 2022 06:59:13 -0500 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 711E4B845; Tue, 27 Dec 2022 03:59:09 -0800 (PST) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 5944824DDB2; Tue, 27 Dec 2022 19:59:07 +0800 (CST) Received: from EXMBX168.cuchost.com (172.16.6.78) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 27 Dec 2022 19:59:06 +0800 Received: from williamqiu-virtual-machine.starfivetech.com (171.223.208.138) by EXMBX168.cuchost.com (172.16.6.78) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 27 Dec 2022 19:59:05 +0800 From: William Qiu To: , CC: Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Hal Feng , Subject: [PATCH v2 1/3] dt-bindings: mmc: Add bindings for StarFive Date: Tue, 27 Dec 2022 19:58:54 +0800 Message-ID: <20221227115856.460790-2-william.qiu@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221227115856.460790-1-william.qiu@starfivetech.com> References: <20221227115856.460790-1-william.qiu@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS066.cuchost.com (172.16.6.26) To EXMBX168.cuchost.com (172.16.6.78) X-YovoleRuleAgent: yovoleflag Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add documentation to describe StarFive designware mobile storage host controller driver. Signed-off-by: William Qiu --- .../bindings/mmc/starfive,jh7110-mmc.yaml | 72 +++++++++++++++++++ 1 file changed, 72 insertions(+) create mode 100644 Documentation/devicetree/bindings/mmc/starfive,jh7110-mmc.yaml diff --git a/Documentation/devicetree/bindings/mmc/starfive,jh7110-mmc.yaml b/Documentation/devicetree/bindings/mmc/starfive,jh7110-mmc.yaml new file mode 100644 index 000000000000..430dd5f24933 --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/starfive,jh7110-mmc.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mmc/starfive,jh7110-mmc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: StarFive Designware Mobile Storage Host Controller + +description: + StarFive uses the Synopsys designware mobile storage host controller + to interface a SoC with storage medium such as eMMC or SD/MMC cards. + +allOf: + - $ref: synopsys-dw-mshc-common.yaml# + +maintainers: + - William Qiu + +properties: + compatible: + const: starfive,jh7110-mmc + + reg: + maxItems: 1 + + clocks: + items: + - description: biu clock + - description: ciu clock + + clock-names: + items: + - const: biu + - const: ciu + + interrupts: + maxItems: 1 + + starfive,syscon: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + arg0:arg0 is syscon. + arg1:arg1 is syscon register offset, used to enable MMC function. + arg2:arg2 is used to enable the register shift of the MMC function. + arg3:arg3 is used to enable the register mask of the MMC function. + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + - starfive,syscon + +unevaluatedProperties: false + +examples: + - | + mmc@16010000 { + compatible = "starfive,jh7110-mmc"; + reg = <0x16010000 0x10000>; + clocks = <&syscrg 91>, + <&syscrg 93>; + clock-names = "biu","ciu"; + resets = <&syscrg 64>; + reset-names = "reset"; + interrupts = <74>; + fifo-depth = <32>; + fifo-watermark-aligned; + data-addr = <0>; + starfive,syscon = <&syscon 0x14 0x1a 0x7c000000>; + };