From patchwork Fri Dec 23 09:48:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xingyu Wu X-Patchwork-Id: 636759 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9A416C4332F for ; Fri, 23 Dec 2022 09:54:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236154AbiLWJyb convert rfc822-to-8bit (ORCPT ); Fri, 23 Dec 2022 04:54:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40800 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236227AbiLWJyG (ORCPT ); Fri, 23 Dec 2022 04:54:06 -0500 Received: from fd01.gateway.ufhost.com (unknown [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 11FEC4664C; Fri, 23 Dec 2022 01:48:20 -0800 (PST) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 2A1F624E102; Fri, 23 Dec 2022 17:48:05 +0800 (CST) Received: from EXMBX161.cuchost.com (172.16.6.71) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 23 Dec 2022 17:48:05 +0800 Received: from localhost.localdomain (183.27.97.120) by EXMBX161.cuchost.com (172.16.6.71) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 23 Dec 2022 17:48:04 +0800 From: Xingyu Wu To: , , "Daniel Lezcano" , Thomas Gleixner , Krzysztof Kozlowski CC: Rob Herring , Paul Walmsley , Palmer Dabbelt , Albert Ou , Philipp Zabel , Xingyu Wu , Samin Guo , Subject: [PATCH v1 3/3] riscv: dts: jh7110: starfive: Add timer node Date: Fri, 23 Dec 2022 17:48:01 +0800 Message-ID: <20221223094801.181315-4-xingyu.wu@starfivetech.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221223094801.181315-1-xingyu.wu@starfivetech.com> References: <20221223094801.181315-1-xingyu.wu@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [183.27.97.120] X-ClientProxiedBy: EXCAS066.cuchost.com (172.16.6.26) To EXMBX161.cuchost.com (172.16.6.71) X-YovoleRuleAgent: yovoleflag Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the timer node for the Starfive JH7110 SoC. Signed-off-by: Xingyu Wu --- arch/riscv/boot/dts/starfive/jh7110.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index c22e8f1d2640..3936c7c0c962 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -356,6 +356,28 @@ gpioa: gpio@17020000 { #gpio-cells = <2>; }; + timer: timer@13050000 { + compatible = "starfive,jh7110-timers"; + reg = <0x0 0x13050000 0x0 0x10000>; + interrupts = <69>, <70>, <71> ,<72>; + interrupt-names = "timer0", "timer1", "timer2", "timer3"; + clocks = <&syscrg JH7110_SYSCLK_TIMER0>, + <&syscrg JH7110_SYSCLK_TIMER1>, + <&syscrg JH7110_SYSCLK_TIMER2>, + <&syscrg JH7110_SYSCLK_TIMER3>, + <&syscrg JH7110_SYSCLK_TIMER_APB>; + clock-names = "timer0", "timer1", + "timer2", "timer3", "apb"; + resets = <&syscrg JH7110_SYSRST_TIMER0>, + <&syscrg JH7110_SYSRST_TIMER1>, + <&syscrg JH7110_SYSRST_TIMER2>, + <&syscrg JH7110_SYSRST_TIMER3>, + <&syscrg JH7110_SYSRST_TIMER_APB>; + reset-names = "timer0", "timer1", + "timer2", "timer3", "apb"; + clock-frequency = <24000000>; + }; + uart0: serial@10000000 { compatible = "snps,dw-apb-uart"; reg = <0x0 0x10000000 0x0 0x10000>;