From patchwork Fri Dec 23 09:47:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xingyu Wu X-Patchwork-Id: 636446 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 45AC9C3DA6E for ; Fri, 23 Dec 2022 09:54:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236160AbiLWJyc convert rfc822-to-8bit (ORCPT ); Fri, 23 Dec 2022 04:54:32 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41108 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236235AbiLWJyG (ORCPT ); Fri, 23 Dec 2022 04:54:06 -0500 Received: from ex01.ufhost.com (unknown [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 892DC37F9F; Fri, 23 Dec 2022 01:48:19 -0800 (PST) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id BCEEE24E2A1; Fri, 23 Dec 2022 17:48:03 +0800 (CST) Received: from EXMBX161.cuchost.com (172.16.6.71) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 23 Dec 2022 17:48:03 +0800 Received: from localhost.localdomain (183.27.97.120) by EXMBX161.cuchost.com (172.16.6.71) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 23 Dec 2022 17:48:02 +0800 From: Xingyu Wu To: , , "Daniel Lezcano" , Thomas Gleixner , Krzysztof Kozlowski CC: Rob Herring , Paul Walmsley , Palmer Dabbelt , Albert Ou , Philipp Zabel , Xingyu Wu , Samin Guo , Subject: [PATCH v1 1/3] dt-bindings: timer: Add timer for StarFive JH7110 SoC Date: Fri, 23 Dec 2022 17:47:59 +0800 Message-ID: <20221223094801.181315-2-xingyu.wu@starfivetech.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221223094801.181315-1-xingyu.wu@starfivetech.com> References: <20221223094801.181315-1-xingyu.wu@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [183.27.97.120] X-ClientProxiedBy: EXCAS066.cuchost.com (172.16.6.26) To EXMBX161.cuchost.com (172.16.6.71) X-YovoleRuleAgent: yovoleflag Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add bindings for the timer on the JH7110 RISC-V SoC by StarFive Technology Ltd. Signed-off-by: Xingyu Wu --- .../timer/starfive,jh7110-timers.yaml | 105 ++++++++++++++++++ 1 file changed, 105 insertions(+) create mode 100644 Documentation/devicetree/bindings/timer/starfive,jh7110-timers.yaml diff --git a/Documentation/devicetree/bindings/timer/starfive,jh7110-timers.yaml b/Documentation/devicetree/bindings/timer/starfive,jh7110-timers.yaml new file mode 100644 index 000000000000..fe58dc056313 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/starfive,jh7110-timers.yaml @@ -0,0 +1,105 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/starfive,jh7110-timers.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: StarFive Timers + +maintainers: + - Samin Guo + - Xingyu Wu + +properties: + compatible: + const: starfive,jh7110-timers + + reg: + maxItems: 1 + + interrupts: + items: + - description: timer channel 0 interrupt + - description: timer channel 1 interrupt + - description: timer channel 2 interrupt + - description: timer channel 3 interrupt + + interrupt-names: + items: + - const: timer0 + - const: timer1 + - const: timer2 + - const: timer3 + + clocks: + items: + - description: timer channel 0 clock + - description: timer channel 1 clock + - description: timer channel 2 clock + - description: timer channel 3 clock + - description: APB clock + + clock-names: + items: + - const: timer0 + - const: timer1 + - const: timer2 + - const: timer3 + - const: apb + + resets: + items: + - description: timer channel 0 reset + - description: timer channel 1 reset + - description: timer channel 2 reset + - description: timer channel 3 reset + - description: APB reset + + reset-names: + items: + - const: timer0 + - const: timer1 + - const: timer2 + - const: timer3 + - const: apb + + clock-frequency: + description: The frequency of the clock that drives the counter, in Hz. + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - resets + - reset-names + - clock-frequency + +unevaluatedProperties: false + +examples: + - | + timer@13050000 { + compatible = "starfive,jh7110-timers"; + reg = <0x13050000 0x10000>; + interrupts = <69>, <70>, <71> ,<72>; + interrupt-names = "timer0", "timer1", "timer2", "timer3"; + clocks = <&clk 125>, + <&clk 126>, + <&clk 127>, + <&clk 128>, + <&clk 124>; + clock-names = "timer0", "timer1", + "timer2", "timer3", "apb"; + resets = <&rst 118>, + <&rst 119>, + <&rst 120>, + <&rst 121>, + <&rst 117>; + reset-names = "timer0", "timer1", + "timer2", "timer3", "apb"; + clock-frequency = <24000000>; + }; +