From patchwork Wed Dec 21 03:44:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Allen-KH Cheng X-Patchwork-Id: 635803 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EC1ACC4332F for ; Wed, 21 Dec 2022 03:44:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233934AbiLUDoX (ORCPT ); Tue, 20 Dec 2022 22:44:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49568 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233411AbiLUDoW (ORCPT ); Tue, 20 Dec 2022 22:44:22 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1E74B1EADC; Tue, 20 Dec 2022 19:44:17 -0800 (PST) X-UUID: fb46169b23a743fc913fa85c80cba7d3-20221221 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=8A0q6r84X2XKK3CAuRIml9dZUg+GB7moOddAKx6LC+0=; b=CLUZa6/EthcMKPGjYUzE7HS7bwOzVf1daE8B4VpX8I5qKNL9oqDqWcgPN8RRwo6zXeGF5icW+cBH9VwmoZDoBYmmq/yMx/mn00Ii+qCBDovT7hTTOpaF1/YQ4JIXyicdYesqgwMEb+vNMkcGFBgL0t/1b5kyK9X4MnhYm7hpa+Y=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.14, REQID:6c485bc7-588c-46a7-b36b-1c70315953c7, IP:0, U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:dcaaed0, CLOUDID:a89df489-8530-4eff-9f77-222cf6e2895b, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: fb46169b23a743fc913fa85c80cba7d3-20221221 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 702773652; Wed, 21 Dec 2022 11:44:12 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Wed, 21 Dec 2022 11:44:11 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Wed, 21 Dec 2022 11:44:11 +0800 From: Allen-KH Cheng To: Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Chun-Jie Chen , Stephen Boyd , Ikjoon Jang CC: , , , , , , Chen-Yu Tsai , Allen-KH Cheng Subject: [PATCH v2 2/6] soc: mediatek: pm-domains: Add buck isolation setting in power domain Date: Wed, 21 Dec 2022 11:44:03 +0800 Message-ID: <20221221034407.19605-3-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221221034407.19605-1-allen-kh.cheng@mediatek.com> References: <20221221034407.19605-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org In MT8192, we need to disable EXT_BUCK_ISO before turning on the ADSP power pm-domains (mtcmos). Add the MTK_SCPD_EXT_BUCK_ISO flag to control the buck isolation setting in the mediatek power domain driver. Fixes: 59b644b01cf4 ("soc: mediatek: Add MediaTek SCPSYS power domains") Signed-off-by: Allen-KH Cheng --- drivers/soc/mediatek/mtk-pm-domains.c | 8 ++++++++ drivers/soc/mediatek/mtk-pm-domains.h | 1 + 2 files changed, 9 insertions(+) diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c index 09e3c38b8466..63f1e183f645 100644 --- a/drivers/soc/mediatek/mtk-pm-domains.c +++ b/drivers/soc/mediatek/mtk-pm-domains.c @@ -218,6 +218,10 @@ static int scpsys_power_on(struct generic_pm_domain *genpd) if (ret) goto err_reg; + if (MTK_SCPD_CAPS(pd, MTK_SCPD_EXT_BUCK_ISO)) + regmap_clear_bits(scpsys->base, pd->data->ext_buck_iso_offs, + pd->data->ext_buck_iso_mask); + /* subsys power on */ regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_BIT); regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_2ND_BIT); @@ -272,6 +276,10 @@ static int scpsys_power_off(struct generic_pm_domain *genpd) if (ret < 0) return ret; + if (MTK_SCPD_CAPS(pd, MTK_SCPD_EXT_BUCK_ISO)) + regmap_set_bits(scpsys->base, pd->data->ext_buck_iso_offs, + pd->data->ext_buck_iso_mask); + clk_bulk_disable_unprepare(pd->num_subsys_clks, pd->subsys_clks); /* subsys power off */ diff --git a/drivers/soc/mediatek/mtk-pm-domains.h b/drivers/soc/mediatek/mtk-pm-domains.h index a5f24c58e35a..5ec53ee073c4 100644 --- a/drivers/soc/mediatek/mtk-pm-domains.h +++ b/drivers/soc/mediatek/mtk-pm-domains.h @@ -10,6 +10,7 @@ #define MTK_SCPD_DOMAIN_SUPPLY BIT(4) /* can't set MTK_SCPD_KEEP_DEFAULT_OFF at the same time */ #define MTK_SCPD_ALWAYS_ON BIT(5) +#define MTK_SCPD_EXT_BUCK_ISO BIT(6) #define MTK_SCPD_CAPS(_scpd, _x) ((_scpd)->data->caps & (_x)) #define SPM_VDE_PWR_CON 0x0210