From patchwork Thu Dec 8 11:52:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 632594 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B0541C3A5A7 for ; Thu, 8 Dec 2022 11:47:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229513AbiLHLrZ (ORCPT ); Thu, 8 Dec 2022 06:47:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38960 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229470AbiLHLrZ (ORCPT ); Thu, 8 Dec 2022 06:47:25 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 69C035CD34; Thu, 8 Dec 2022 03:47:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1670500044; x=1702036044; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=MVTL6UUvKcTMVCYpcQSuarT5kz7nFvxwqkKHy/9pKRI=; b=s3w5JTnmDfhG0fCQYp/FygzJ6nbkqKQq9yj0DUk+zrnJIZHF19ZS8pyH kU+l6OQ/Q7mCRUJGEiVMcVrPlARU7bYV9SDkXh4gER4IQemvs5mGRhzqd FV/czQ4qIEiWPina9q6Dba3y+Mhy4Qf0s8wyqMXWwgNtmOeDel2YmdC6O DmzkSwDV0qYIyahvJdOGRD9Voo5I56v41mHUlvfY7L5s7tVFrWL5cErGh 4yGy2srAfsYQ8GTRsHAHrTx39P0VxExYicelA5YtML76JNy2jXpGPFq1b 8LNCxVa19gIeFO0VWF8No/J44SDqPk7JmgxLR9K9xj3bowb9CsGt9esJX Q==; X-IronPort-AV: E=Sophos;i="5.96,227,1665471600"; d="scan'208";a="127112214" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 08 Dec 2022 04:47:23 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Thu, 8 Dec 2022 04:47:22 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Thu, 8 Dec 2022 04:47:20 -0700 From: Claudiu Beznea To: , , , CC: , , , Claudiu Beznea Subject: [PATCH] ARM: dts: at91: sam9x60: fix the ddr clock for sam9x60 Date: Thu, 8 Dec 2022 13:52:41 +0200 Message-ID: <20221208115241.36312-1-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The 2nd DDR clock for sam9x60 DDR controller is peripheral clock with id 49. Fixes: 1e5f532c2737 ("ARM: dts: at91: sam9x60: add device tree for soc and board") Signed-off-by: Claudiu Beznea --- arch/arm/boot/dts/sam9x60.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi index 8f5477e307dd..37a5d96aaf64 100644 --- a/arch/arm/boot/dts/sam9x60.dtsi +++ b/arch/arm/boot/dts/sam9x60.dtsi @@ -564,7 +564,7 @@ pmecc: ecc-engine@ffffe000 { mpddrc: mpddrc@ffffe800 { compatible = "microchip,sam9x60-ddramc", "atmel,sama5d3-ddramc"; reg = <0xffffe800 0x200>; - clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_CORE PMC_MCK>; + clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 49>; clock-names = "ddrck", "mpddr"; };