From patchwork Tue Dec 6 20:07:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 631752 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F183EC352A1 for ; Tue, 6 Dec 2022 20:08:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229671AbiLFUIA (ORCPT ); Tue, 6 Dec 2022 15:08:00 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45026 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229723AbiLFUHz (ORCPT ); Tue, 6 Dec 2022 15:07:55 -0500 Received: from mail.3ffe.de (0001.3ffe.de [IPv6:2a01:4f8:c0c:9d57::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 437D72E9DF; Tue, 6 Dec 2022 12:07:53 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mail.3ffe.de (Postfix) with ESMTPSA id 344473B9B; Tue, 6 Dec 2022 21:07:52 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2022082101; t=1670357272; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=CH55z4SKaqTQIV4BtwPp6ZSR/J9q1HnwI74TrjmDJ04=; b=x3tN/vb+zqUPk++3lXTEF088HqUzI1gkAJ4rfDrSRuDJsQyoXB5Fd/omiY6PuY1quHdkIs mwiO2+hvPfxJBD9IxssEN9MDjAmGDwchltUjHb8RXfHfzE+G/2AkfiZaYlzhsfriDqyISf XCLTQujBk70PMta1OYEqQ/456/zlUNeyJPk0uK/njfVXU1IrqAVmYT4XDjWUI4jusGqQl9 kNz2ZNnjidQ6UfZ90mDuDuQj6LdXd9X1aEXGLYjtcLIgCkOkQbizTUbKSZhOgaXFVGIOHV 4dpqcKrwxrEvFzL/hm7TSRdKJ64yiXIng7BAlRKMpahN1hEazVYFybQxKhryAA== From: Michael Walle To: Jonathan Corbet , Srinivas Kandagatla , Miquel Raynal , Rob Herring , Frank Rowand , Sascha Hauer Cc: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Michael Walle , Dan Carpenter Subject: [PATCH v5 13/21] nvmem: core: add per-cell post processing Date: Tue, 6 Dec 2022 21:07:32 +0100 Message-Id: <20221206200740.3567551-14-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221206200740.3567551-1-michael@walle.cc> References: <20221206200740.3567551-1-michael@walle.cc> MIME-Version: 1.0 X-Spam: Yes Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Instead of relying on the name the consumer is using for the cell, like it is done for the nvmem .cell_post_process configuration parameter, provide a per-cell post processing hook. This can then be populated by the NVMEM provider (or the NVMEM layout) when adding the cell. Signed-off-by: Michael Walle --- changes since v4: - none changes since v3: - none changes since v2: - none changes since v1: - rename hook to read_post_process drivers/nvmem/core.c | 17 +++++++++++++++++ include/linux/nvmem-provider.h | 3 +++ 2 files changed, 20 insertions(+) diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c index 748a850a1960..5afd4818cb34 100644 --- a/drivers/nvmem/core.c +++ b/drivers/nvmem/core.c @@ -53,6 +53,7 @@ struct nvmem_cell_entry { int bytes; int bit_offset; int nbits; + nvmem_cell_post_process_t read_post_process; struct device_node *np; struct nvmem_device *nvmem; struct list_head node; @@ -469,6 +470,7 @@ static int nvmem_cell_info_to_nvmem_cell_entry_nodup(struct nvmem_device *nvmem, cell->offset = info->offset; cell->bytes = info->bytes; cell->name = info->name; + cell->read_post_process = info->read_post_process; cell->bit_offset = info->bit_offset; cell->nbits = info->nbits; @@ -1549,6 +1551,13 @@ static int __nvmem_cell_read(struct nvmem_device *nvmem, if (cell->bit_offset || cell->nbits) nvmem_shift_read_buffer_in_place(cell, buf); + if (cell->read_post_process) { + rc = cell->read_post_process(nvmem->priv, id, index, + cell->offset, buf, cell->bytes); + if (rc) + return rc; + } + if (nvmem->cell_post_process) { rc = nvmem->cell_post_process(nvmem->priv, id, index, cell->offset, buf, cell->bytes); @@ -1657,6 +1666,14 @@ static int __nvmem_cell_entry_write(struct nvmem_cell_entry *cell, void *buf, si (cell->bit_offset == 0 && len != cell->bytes)) return -EINVAL; + /* + * Any cells which have a read_post_process hook are read-only because + * we cannot reverse the operation and it might affect other cells, + * too. + */ + if (cell->read_post_process) + return -EINVAL; + if (cell->bit_offset || cell->nbits) { buf = nvmem_cell_prepare_write_buffer(cell, buf, len); if (IS_ERR(buf)) diff --git a/include/linux/nvmem-provider.h b/include/linux/nvmem-provider.h index 4185767c114f..1930496d8854 100644 --- a/include/linux/nvmem-provider.h +++ b/include/linux/nvmem-provider.h @@ -54,6 +54,8 @@ struct nvmem_keepout { * @bit_offset: Bit offset if cell is smaller than a byte. * @nbits: Number of bits. * @np: Optional device_node pointer. + * @read_post_process: Callback for optional post processing of cell data + * on reads. */ struct nvmem_cell_info { const char *name; @@ -62,6 +64,7 @@ struct nvmem_cell_info { unsigned int bit_offset; unsigned int nbits; struct device_node *np; + nvmem_cell_post_process_t read_post_process; }; /**