From patchwork Fri Nov 18 18:51:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 626262 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DEDA5C352A1 for ; Fri, 18 Nov 2022 18:52:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241807AbiKRSwR (ORCPT ); Fri, 18 Nov 2022 13:52:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51348 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242881AbiKRSv5 (ORCPT ); Fri, 18 Nov 2022 13:51:57 -0500 Received: from mail.3ffe.de (0001.3ffe.de [IPv6:2a01:4f8:c0c:9d57::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7C0518FF9E; Fri, 18 Nov 2022 10:51:56 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mail.3ffe.de (Postfix) with ESMTPSA id 8B219276A; Fri, 18 Nov 2022 19:51:31 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2022082101; t=1668797491; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=OG+BVTzaBMIaLV8CZzAesSGp8DMidyfnS2AwgUumpzc=; b=wLLRoBWV22ibu36eSl8Pmzp0vTUmUSidcSKUeTZrmB1jxB1CoLZi3tlc9uFHZTneaAKeg+ jbIpOoOa3jNxmRHwpqxAdNWTeZXfkXfS4USCkumVgjf/fpLlPeeSEytuEPG0aRDViJh/Hr 9uTw3RSyPxh16PoR57nFP5sD/xzohfQoRsQ1AqnWIrFwDZmsxUVTNUDPxH8aW+nbPoHuNf ZpSv+AGhp5F6M8V8IMfCDH3A0gnen7ajIgt0T1ivfC7NellWHFH3GZZLPo92MvWDC/qoPI COKZ5+QpkK8ZOXzfS2Z8Mr0iNLcBiok2mkhnl3pBTN1UgYhlgySC66QCKZvhIg== From: Michael Walle To: Jonathan Corbet , Srinivas Kandagatla , Miquel Raynal , Rob Herring , Frank Rowand Cc: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Michael Walle Subject: [PATCH v3 14/18] nvmem: core: provide own priv pointer in post process callback Date: Fri, 18 Nov 2022 19:51:14 +0100 Message-Id: <20221118185118.1190044-15-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221118185118.1190044-1-michael@walle.cc> References: <20221118185118.1190044-1-michael@walle.cc> MIME-Version: 1.0 X-Spam: Yes Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org It doesn't make any more sense to have a opaque pointer set up by the nvmem device. Usually, the layout isn't associated with a particular nvmem device. Instead, let the caller who set the post process callback provide the priv pointer. Signed-off-by: Michael Walle --- changes since v2: - don't drop the pointer but let the user specify an opaque pointer changes since v1: - new patch drivers/nvmem/core.c | 4 +++- include/linux/nvmem-provider.h | 5 ++++- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c index 9234c7d87a69..e03976f6ad1c 100644 --- a/drivers/nvmem/core.c +++ b/drivers/nvmem/core.c @@ -53,6 +53,7 @@ struct nvmem_cell_entry { int bit_offset; int nbits; nvmem_cell_post_process_t read_post_process; + void *priv; struct device_node *np; struct nvmem_device *nvmem; struct list_head node; @@ -470,6 +471,7 @@ static int nvmem_cell_info_to_nvmem_cell_entry_nodup(struct nvmem_device *nvmem, cell->bytes = info->bytes; cell->name = info->name; cell->read_post_process = info->read_post_process; + cell->priv = info->priv; cell->bit_offset = info->bit_offset; cell->nbits = info->nbits; @@ -1558,7 +1560,7 @@ static int __nvmem_cell_read(struct nvmem_device *nvmem, nvmem_shift_read_buffer_in_place(cell, buf); if (cell->read_post_process) { - rc = cell->read_post_process(nvmem->priv, id, index, + rc = cell->read_post_process(cell->priv, id, index, cell->offset, buf, cell->bytes); if (rc) return rc; diff --git a/include/linux/nvmem-provider.h b/include/linux/nvmem-provider.h index 12833fe4eb4d..cb0814f2ddae 100644 --- a/include/linux/nvmem-provider.h +++ b/include/linux/nvmem-provider.h @@ -20,7 +20,8 @@ typedef int (*nvmem_reg_write_t)(void *priv, unsigned int offset, void *val, size_t bytes); /* used for vendor specific post processing of cell data */ typedef int (*nvmem_cell_post_process_t)(void *priv, const char *id, int index, - unsigned int offset, void *buf, size_t bytes); + unsigned int offset, void *buf, + size_t bytes); enum nvmem_type { NVMEM_TYPE_UNKNOWN = 0, @@ -56,6 +57,7 @@ struct nvmem_keepout { * @np: Optional device_node pointer. * @read_post_process: Callback for optional post processing of cell data * on reads. + * @priv: Opaque data passed to the read_post_process hook. */ struct nvmem_cell_info { const char *name; @@ -65,6 +67,7 @@ struct nvmem_cell_info { unsigned int nbits; struct device_node *np; nvmem_cell_post_process_t read_post_process; + void *priv; }; /**