From patchwork Fri Nov 18 18:51:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 626260 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5414EC4321E for ; Fri, 18 Nov 2022 18:52:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242844AbiKRSwV (ORCPT ); Fri, 18 Nov 2022 13:52:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52030 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242875AbiKRSv4 (ORCPT ); Fri, 18 Nov 2022 13:51:56 -0500 Received: from mail.3ffe.de (0001.3ffe.de [159.69.201.130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D5E978FF81; Fri, 18 Nov 2022 10:51:54 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mail.3ffe.de (Postfix) with ESMTPSA id 87903276D; Fri, 18 Nov 2022 19:51:30 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2022082101; t=1668797490; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=SzbGdPnxRIat++k7m29Lk2wnbjZdv07bf+q98j4b4C4=; b=B1yNgVht2M55NFsZ9qfyNOX1SQSRTFtJHx5LG9FogHpZSQJvn6SWuZ9sxDTBTo+6z38MOC MYWZYP7jIA9xqY2/Y/33GvAkwrYiyDKackyeDnUPfrfe3Rn761D4S6667swfRQ8bzCZH39 pxpyUlS9dC41GTKagTQRoHuajo2Inh6W1x+ava6z9S12ksweZezO2qIefS6a62FI2FSPAR s1lvPaaXQudN2iyQHawmFZfZ7+OfgR+/UyWxP/4k+F/G6PRXy86kHhPqb7bZb4wHSzvHQJ +Gfe6aS/QBqJvw65RRxRKWM2djJ3svNVX0U2lAqrpId2pE6KOn6GUSS3o8hEYQ== From: Michael Walle To: Jonathan Corbet , Srinivas Kandagatla , Miquel Raynal , Rob Herring , Frank Rowand Cc: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Michael Walle Subject: [PATCH v3 12/18] nvmem: imx-ocotp: replace global post processing with layouts Date: Fri, 18 Nov 2022 19:51:12 +0100 Message-Id: <20221118185118.1190044-13-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221118185118.1190044-1-michael@walle.cc> References: <20221118185118.1190044-1-michael@walle.cc> MIME-Version: 1.0 X-Spam: Yes Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org In preparation of retiring the global post processing hook change this driver to use layouts. The layout will be supplied during registration and will be used to add the post processing hook to all added cells. Signed-off-by: Michael Walle Tested-by: Michael Walle # on kontron-pitx-imx8m --- changes since v2: - none changes since v1: - new patch drivers/nvmem/imx-ocotp.c | 30 +++++++++++++++++++----------- 1 file changed, 19 insertions(+), 11 deletions(-) diff --git a/drivers/nvmem/imx-ocotp.c b/drivers/nvmem/imx-ocotp.c index e9b52ecb3f72..ac0edb6398f1 100644 --- a/drivers/nvmem/imx-ocotp.c +++ b/drivers/nvmem/imx-ocotp.c @@ -225,18 +225,13 @@ static int imx_ocotp_read(void *context, unsigned int offset, static int imx_ocotp_cell_pp(void *context, const char *id, int index, unsigned int offset, void *data, size_t bytes) { - struct ocotp_priv *priv = context; + u8 *buf = data; + int i; /* Deal with some post processing of nvmem cell data */ - if (id && !strcmp(id, "mac-address")) { - if (priv->params->reverse_mac_address) { - u8 *buf = data; - int i; - - for (i = 0; i < bytes/2; i++) - swap(buf[i], buf[bytes - i - 1]); - } - } + if (id && !strcmp(id, "mac-address")) + for (i = 0; i < bytes / 2; i++) + swap(buf[i], buf[bytes - i - 1]); return 0; } @@ -488,7 +483,6 @@ static struct nvmem_config imx_ocotp_nvmem_config = { .stride = 1, .reg_read = imx_ocotp_read, .reg_write = imx_ocotp_write, - .cell_post_process = imx_ocotp_cell_pp, }; static const struct ocotp_params imx6q_params = { @@ -595,6 +589,17 @@ static const struct of_device_id imx_ocotp_dt_ids[] = { }; MODULE_DEVICE_TABLE(of, imx_ocotp_dt_ids); +static void imx_ocotp_fixup_cell_info(struct nvmem_device *nvmem, + struct nvmem_layout *layout, + struct nvmem_cell_info *cell) +{ + cell->read_post_process = imx_ocotp_cell_pp; +} + +struct nvmem_layout imx_ocotp_layout = { + .fixup_cell_info = imx_ocotp_fixup_cell_info, +}; + static int imx_ocotp_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -619,6 +624,9 @@ static int imx_ocotp_probe(struct platform_device *pdev) imx_ocotp_nvmem_config.size = 4 * priv->params->nregs; imx_ocotp_nvmem_config.dev = dev; imx_ocotp_nvmem_config.priv = priv; + if (priv->params->reverse_mac_address) + imx_ocotp_nvmem_config.layout = &imx_ocotp_layout; + priv->config = &imx_ocotp_nvmem_config; clk_prepare_enable(priv->clk);