From patchwork Fri Nov 18 11:30:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yassine Oudjana X-Patchwork-Id: 626318 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 96DC8C433FE for ; Fri, 18 Nov 2022 11:32:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241681AbiKRLcp (ORCPT ); Fri, 18 Nov 2022 06:32:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34390 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241377AbiKRLcV (ORCPT ); Fri, 18 Nov 2022 06:32:21 -0500 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [IPv6:2a00:1450:4864:20::336]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D34687FC0B; Fri, 18 Nov 2022 03:32:07 -0800 (PST) Received: by mail-wm1-x336.google.com with SMTP id c65-20020a1c3544000000b003cfffd00fc0so3326576wma.1; Fri, 18 Nov 2022 03:32:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=FHS4xwDjkiA0w7wmXV8oTrtUiAVe60d4UjcHzqznohk=; b=KxmieWi6LcnoMSufsx2H60XoPHytWoiY2g2xEWOpLds//yqefgYkioPdZRq/dmI6C/ bMUTa4mMMGso7LEpJUe9ymqDlkI+LH99ur3f3bbel5mul55QAGUPhcWgl/ONRekL+PwV 3BvmxJixyKduMKdD/fdvKNqo38Hb/WeQpDG3UJozSzcJ7Qf7KBmLL9R5ljuTC3eKmceK fyJONdak3EMU23TMiBslV4uIyJbExCa0oJIxfKOKlmx7e99btj8vTPuOQ5/lenR8OgDc HU1eKC0zO0IC8y/MD3RueO6KGr0mXr+3rTANpOigJLf1XjLcOmFH7Po2r+gtSsuMWbDH p6Wg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FHS4xwDjkiA0w7wmXV8oTrtUiAVe60d4UjcHzqznohk=; b=vhxdiYphgv1T2dKeoP1OC3Gwvy6Rtk/b/fjjYKTjdDyCaLZika2EWzPOvzER1ceDvx tVop0+rVMEjPYXhsg5CBFEdGBC0OpkFU5LvfU+d3XPfYENwY3HsHeSyZpSeooGIk3sXr ZbNN2kKidtwjsrdLsUvQnAYrHwHZRj1C91Qbamjfo3W0NdESyUsVEEzs7vC47M+BMuYR boAOpIDW9Igcr21LHBw4OZs9OfRHx2a9H9Ja2YQz1mIl/+PPEk/FRSX+hGwoR32q8tjR Cbn3FeLOLPNhIg1BDkPXrV49Jx06IRYqpB9As4CdqdUaMy8wvm/WyfptMo4MfWKSquh8 xNmg== X-Gm-Message-State: ANoB5plVWW6Bla9U/wuDtPLdvoVl3nKqGHI1PTkWT/O7NFXYMNYTPMaF MFAezCzrBrG313sFH40GvlU= X-Google-Smtp-Source: AA0mqf5b/Gnn4QxNOi6Wr/UKJy8KJUlCLqezaSAdhbXTNpi90xJbNjOwAXkPHMqD4QiKWZIuaEgejQ== X-Received: by 2002:a05:600c:1d14:b0:3cf:925e:198c with SMTP id l20-20020a05600c1d1400b003cf925e198cmr4537645wms.144.1668771126415; Fri, 18 Nov 2022 03:32:06 -0800 (PST) Received: from localhost.localdomain ([95.183.227.98]) by smtp.gmail.com with ESMTPSA id l24-20020a05600c1d1800b003cf878c4468sm9894817wms.5.2022.11.18.03.32.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Nov 2022 03:32:06 -0800 (PST) From: Yassine Oudjana X-Google-Original-From: Yassine Oudjana To: Linus Walleij , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Sean Wang , Andy Teng , AngeloGioacchino Del Regno Cc: Yassine Oudjana , Yassine Oudjana , linux-mediatek@lists.infradead.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 4/7] arm64: dts: mediatek: mt6797: Make pin configuration nodes follow DT bindings Date: Fri, 18 Nov 2022 14:30:25 +0300 Message-Id: <20221118113028.145348-5-y.oudjana@protonmail.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221118113028.145348-1-y.oudjana@protonmail.com> References: <20221118113028.145348-1-y.oudjana@protonmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Yassine Oudjana Add -pins suffix to pin configuration nodes to follow DT bindings and pass dtbs_check. Signed-off-by: Yassine Oudjana Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt6797.dtsi | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt6797.dtsi b/arch/arm64/boot/dts/mediatek/mt6797.dtsi index 15616231022a..0c2b477184ae 100644 --- a/arch/arm64/boot/dts/mediatek/mt6797.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6797.dtsi @@ -135,70 +135,70 @@ pio: pinctrl@10005000 { gpio-controller; #gpio-cells = <2>; - uart0_pins_a: uart0 { + uart0_pins_a: uart0-pins { pins0 { pinmux = , ; }; }; - uart1_pins_a: uart1 { + uart1_pins_a: uart1-pins { pins1 { pinmux = , ; }; }; - i2c0_pins_a: i2c0 { + i2c0_pins_a: i2c0-pins { pins0 { pinmux = , ; }; }; - i2c1_pins_a: i2c1 { + i2c1_pins_a: i2c1-pins { pins1 { pinmux = , ; }; }; - i2c2_pins_a: i2c2 { + i2c2_pins_a: i2c2-pins { pins2 { pinmux = , ; }; }; - i2c3_pins_a: i2c3 { + i2c3_pins_a: i2c3-pins { pins3 { pinmux = , ; }; }; - i2c4_pins_a: i2c4 { + i2c4_pins_a: i2c4-pins { pins4 { pinmux = , ; }; }; - i2c5_pins_a: i2c5 { + i2c5_pins_a: i2c5-pins { pins5 { pinmux = , ; }; }; - i2c6_pins_a: i2c6 { + i2c6_pins_a: i2c6-pins { pins6 { pinmux = , ; }; }; - i2c7_pins_a: i2c7 { + i2c7_pins_a: i2c7-pins { pins7 { pinmux = , ;