From patchwork Sat Oct 29 21:13:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 620674 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 22F34FA3746 for ; Sat, 29 Oct 2022 21:13:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229642AbiJ2VNS (ORCPT ); Sat, 29 Oct 2022 17:13:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54646 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229716AbiJ2VNS (ORCPT ); Sat, 29 Oct 2022 17:13:18 -0400 Received: from mail-lj1-x22d.google.com (mail-lj1-x22d.google.com [IPv6:2a00:1450:4864:20::22d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 31FAF3D5A1 for ; Sat, 29 Oct 2022 14:13:17 -0700 (PDT) Received: by mail-lj1-x22d.google.com with SMTP id bn35so12423191ljb.5 for ; Sat, 29 Oct 2022 14:13:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=swTzgpM0Pz/+17CyZPXCMYY39bgiFlYC7ketMF0VDSU=; b=qjDZPTSAikMnTJw7RtegzieQLRrkmgafUzkKPtnThgNEijjf25ZKWiCCeVSP1kgyHv cWfRIghlWgmJ66I4haQOKw8sqctrjoqjx663Dqfy0aO+AcHvoKy3TwAhadIM57/jHMBW ZijkEKoHFMkO6a2/RJU88Dcw5A25uaE9+Iu4Rw9AJR435Q5/VRkyMXymAMEOqml1EvfN zTwBlgPCzp3szymADo5qBioYfMKB2WipypdqyFDyUwkm8K8DWs/oy1+YK2WazzUAW/O/ y8z1lZpBe9fq8cLNlOGaiN19gkFcojJR9zb+0Tr69VqE70hhX+IeGO7LcCeZ/tAX95ol VLGQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=swTzgpM0Pz/+17CyZPXCMYY39bgiFlYC7ketMF0VDSU=; b=l500ruTV7XITHwW8aKlZaoD+Q+isv03VVTbbJBKP5DsRPMkxUWz+g9EHkZfiExeKXc O1sRusl5PfYmn+vL9NfJsYWBE3e2eYNxYQ/39WDWzwaSjlULcW1VXe5yzSiSBw+p1GzP P5EYZbQfmluzbNMfLSIxQp4YlvriD0uIZc2UZju54ARzgtRiwVN6ONx5EmoGmeFTU4IF DxF6GSlCr84m5NvnKiOaj/nwqp61UHgVH2UPTDMWuFZGPlggEnXxg8wlqV0PmZiOuHan C8yXNrP9G9WdmnPStC7zJ/K6oizx33YdB30cZUsB3laT2fKK4oADT+G5oktY1SzSbA+R eQ8g== X-Gm-Message-State: ACrzQf3W9vtshD3+eBQIIt46+rGQT4Qv8ifxx3JHpfZKusZ2N/QBZc7b 0SutyjthshVaQLvDEt4Yda2m4w== X-Google-Smtp-Source: AMsMyM7MYkde/YdEibYj6wq2j+5pTXEeJMeIPK+cSHSOHrk7IOl01tEyuBC+b8dntHuhTnTnu1sffg== X-Received: by 2002:a2e:5cb:0:b0:277:794:cb70 with SMTP id 194-20020a2e05cb000000b002770794cb70mr2288707ljf.280.1667077995491; Sat, 29 Oct 2022 14:13:15 -0700 (PDT) Received: from localhost.localdomain ([195.165.23.90]) by smtp.gmail.com with ESMTPSA id j14-20020a05651231ce00b004a480c8f770sm433508lfe.210.2022.10.29.14.13.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 29 Oct 2022 14:13:15 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Jingoo Han , Gustavo Pimentel , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Bjorn Helgaas , Vinod Koul , Kishon Vijay Abraham I Cc: Philipp Zabel , Johan Hovold , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH v1 1/7] dt-bindings: PCI: qcom: Add sm8350 to bindings Date: Sun, 30 Oct 2022 00:13:06 +0300 Message-Id: <20221029211312.929862-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221029211312.929862-1-dmitry.baryshkov@linaro.org> References: <20221029211312.929862-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add bindings for two PCIe hosts on SM8350 platform. The only difference between them is in the aggre0 clock, which warrants the oneOf clause for the clocks properties. Signed-off-by: Dmitry Baryshkov --- .../devicetree/bindings/pci/qcom,pcie.yaml | 54 +++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index 54f07852d279..55bf5958ef79 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -32,6 +32,7 @@ properties: - qcom,pcie-sdm845 - qcom,pcie-sm8150 - qcom,pcie-sm8250 + - qcom,pcie-sm8350 - qcom,pcie-sm8450-pcie0 - qcom,pcie-sm8450-pcie1 - qcom,pcie-ipq6018 @@ -185,6 +186,7 @@ allOf: - qcom,pcie-sc8180x - qcom,pcie-sc8280xp - qcom,pcie-sm8250 + - qcom,pcie-sm8350 - qcom,pcie-sm8450-pcie0 - qcom,pcie-sm8450-pcie1 then: @@ -540,6 +542,57 @@ allOf: items: - const: pci # PCIe core reset + - if: + properties: + compatible: + contains: + enum: + - qcom,pcie-sm8350 + then: + oneOf: + # Unfortunately the "optional" ref clock is used in the middle of the list + - properties: + clocks: + maxItems: 13 + clock-names: + items: + - const: pipe # PIPE clock + - const: pipe_mux # PIPE MUX + - const: phy_pipe # PIPE output clock + - const: ref # REFERENCE clock + - const: aux # Auxiliary clock + - const: cfg # Configuration clock + - const: bus_master # Master AXI clock + - const: bus_slave # Slave AXI clock + - const: slave_q2a # Slave Q2A clock + - const: tbu # PCIe TBU clock + - const: ddrss_sf_tbu # PCIe SF TBU clock + - const: aggre0 # Aggre NoC PCIe0 AXI clock + - const: aggre1 # Aggre NoC PCIe1 AXI clock + - properties: + clocks: + maxItems: 12 + clock-names: + items: + - const: pipe # PIPE clock + - const: pipe_mux # PIPE MUX + - const: phy_pipe # PIPE output clock + - const: ref # REFERENCE clock + - const: aux # Auxiliary clock + - const: cfg # Configuration clock + - const: bus_master # Master AXI clock + - const: bus_slave # Slave AXI clock + - const: slave_q2a # Slave Q2A clock + - const: tbu # PCIe TBU clock + - const: ddrss_sf_tbu # PCIe SF TBU clock + - const: aggre1 # Aggre NoC PCIe1 AXI clock + properties: + resets: + maxItems: 1 + reset-names: + items: + - const: pci # PCIe core reset + - if: properties: compatible: @@ -670,6 +723,7 @@ allOf: - qcom,pcie-sdm845 - qcom,pcie-sm8150 - qcom,pcie-sm8250 + - qcom,pcie-sm8350 - qcom,pcie-sm8450-pcie0 - qcom,pcie-sm8450-pcie1 then: