From patchwork Thu Oct 27 22:50:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 619327 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 036BCFA373D for ; Thu, 27 Oct 2022 22:50:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235256AbiJ0Wuo (ORCPT ); Thu, 27 Oct 2022 18:50:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60816 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229531AbiJ0Wun (ORCPT ); Thu, 27 Oct 2022 18:50:43 -0400 Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D05755FDED for ; Thu, 27 Oct 2022 15:50:41 -0700 (PDT) Received: from tr.lan (ip-86-49-120-218.bb.vodafone.cz [86.49.120.218]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id D51668504E; Fri, 28 Oct 2022 00:50:39 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1666911040; bh=N62Hk+Gw4oQcI//HElUbloWjF9R9+UkngmVF9hoEa2s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=uImhcOTuCWiWIlNj721jXHtopftKa7v/WhqVU+4bD0zsLWFr+gRZ+gWLPHqAt40BT jnuIUe0Yx+ETUco7gY9xuL+dINt0wnLx6rmnCkjEEcugA5rMzsPCmN6/XdA+XlPxM3 wm+3uhcJ9oeOwaZyxYWZVCEt4sjatxFCvbZNUtIaycUB3TwqYau1SK5MS2jYVr3Ed/ NxEwy5KJPm8lCifnAmD13fSBv9n4k/fo5HvmYcVPwCz+/iNeMiKGPLvvxtnWGIE1QU t2mQ8vp4SIyHpP3baKOwosxw6IWgrFWBOhg31PJsQziQk+x7HwZVDiYmh0aAmszYyV fgmqDVElDNBoQ== From: Marek Vasut To: linux-arm-kernel@lists.infradead.org Cc: Marek Vasut , Alexandre Torgue , =?utf-8?b?UmFmYcWCIE1pxYJl?= =?utf-8?b?Y2tp?= , Rob Herring , Srinivas Kandagatla , devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH 3/3] [RFC] ARM: dts: stm32: Add nvmem-syscon node to TAMP to expose boot count on DHSOM Date: Fri, 28 Oct 2022 00:50:20 +0200 Message-Id: <20221027225020.215149-3-marex@denx.de> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221027225020.215149-1-marex@denx.de> References: <20221027225020.215149-1-marex@denx.de> MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add nvmem-syscon subnode to expose TAMP_BKPxR register 19 to user space. This register contains U-Boot boot counter, by exposing it to user space the user space can reset the boot counter. Read access example: " $ hexdump -vC /sys/bus/nvmem/devices/5c00a000.tamp\:nvmem0/nvmem 00000000 0c 00 c4 b0 " Signed-off-by: Marek Vasut --- Cc: Alexandre Torgue Cc: Rafał Miłecki Cc: Rob Herring Cc: Srinivas Kandagatla Cc: devicetree@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org --- arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi | 11 +++++++++++ arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi | 11 +++++++++++ 2 files changed, 22 insertions(+) diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi index 155843e1402fb..8277837be8a51 100644 --- a/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi +++ b/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi @@ -533,6 +533,17 @@ &sdmmc3 { status = "okay"; }; +&tamp { + #address-cells = <1>; + #size-cells = <1>; + + /* Boot counter */ + nvmem { + compatible = "nvmem-syscon"; + reg = <0x14c 0x4>; + }; +}; + &uart4 { pinctrl-names = "default"; pinctrl-0 = <&uart4_pins_a>; diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi index 134a798ad3f23..42a8d5cdd7024 100644 --- a/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi +++ b/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi @@ -271,3 +271,14 @@ &rng1 { &rtc { status = "okay"; }; + +&tamp { + #address-cells = <1>; + #size-cells = <1>; + + /* Boot counter */ + nvmem { + compatible = "nvmem-syscon"; + reg = <0x14c 0x4>; + }; +};