@@ -172,7 +172,14 @@ rtc: rtc@90090000 {
};
misc: misc@900a0000 {
+ compatible = "syscon", "simple-mfd";
reg = <0x900a0000 0x1000>;
+
+ reboot {
+ compatible = "syscon-reboot";
+ offset = <0x08>;
+ value = <0x02>;
+ };
};
pwr: pwr@900b0000 {
@@ -9,5 +9,7 @@ config ARCH_NSPIRE
select ARM_VIC
select ARM_TIMER_SP804
select NSPIRE_TIMER
+ select POWER_RESET
+ select POWER_RESET_SYSCON
help
This enables support for systems using the TI-NSPIRE CPU
@@ -5,9 +5,6 @@
* Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>
*/
-#define NSPIRE_MISC_PHYS_BASE 0x900A0000
-#define NSPIRE_MISC_HWRESET 0x08
-
#define NSPIRE_PWR_PHYS_BASE 0x900B0000
#define NSPIRE_PWR_VIRT_BASE 0xFEEB0000
#define NSPIRE_PWR_BUS_DISABLE1 0x18
@@ -27,16 +27,6 @@ static const char *const nspire_dt_match[] __initconst = {
NULL,
};
-static void nspire_restart(enum reboot_mode mode, const char *cmd)
-{
- void __iomem *base = ioremap(NSPIRE_MISC_PHYS_BASE, SZ_4K);
- if (!base)
- return;
-
- writel(2, base + NSPIRE_MISC_HWRESET);
-}
-
DT_MACHINE_START(NSPIRE, "TI-NSPIRE")
.dt_compat = nspire_dt_match,
- .restart = nspire_restart,
MACHINE_END