From patchwork Tue Oct 25 13:29:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 618400 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA6E2FA3740 for ; Tue, 25 Oct 2022 13:30:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232853AbiJYNaQ (ORCPT ); Tue, 25 Oct 2022 09:30:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43330 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232825AbiJYNaM (ORCPT ); Tue, 25 Oct 2022 09:30:12 -0400 Received: from mxout4.routing.net (mxout4.routing.net [IPv6:2a03:2900:1:a::9]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BB50BDEF13; Tue, 25 Oct 2022 06:30:01 -0700 (PDT) Received: from mxbox1.masterlogin.de (unknown [192.168.10.88]) by mxout4.routing.net (Postfix) with ESMTP id C1A5D1025EB; Tue, 25 Oct 2022 13:29:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1666704599; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=t6qFQWHmKSFyBCgF8VJRGuHsK4Ei7rkne6tsfke6P0E=; b=vU5Gta+sTAyNnclvdMa1mPapNQxHT2bo3oZfzMJg4hTzgHhgmXXkx/A88WP0oZ/uZbiJFz GzTBZY2xXdAHOyKVX69O1fg/bVrQ1/Ha+shwF39e7ofPiG4SKV1Oka99dU4fAjEuandQZR btJr89gnqgYy2O7Xmcrrb3Tg592WmNU= Received: from frank-G5.. (fttx-pool-217.61.152.57.bambit.de [217.61.152.57]) by mxbox1.masterlogin.de (Postfix) with ESMTPSA id 992A4403A9; Tue, 25 Oct 2022 13:29:58 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Chaotian Jing , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Wenbin Mei , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Sam Shih , =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Krzysztof Kozlowski Subject: [PATCH v5 1/6] dt-bindings: mmc: mtk-sd: Set clocks based on compatible Date: Tue, 25 Oct 2022 15:29:48 +0200 Message-Id: <20221025132953.81286-2-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221025132953.81286-1-linux@fw-web.de> References: <20221025132953.81286-1-linux@fw-web.de> MIME-Version: 1.0 X-Mail-ID: 22076d22-0fc1-48b2-8540-d60d145b0ee7 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Nícolas F. R. A. Prado The binding was describing a single clock list for all platforms, but that's not really suitable: Most platforms using at least 2 clocks (source, hclk), some of them a third "source_cg". Mt2712 requires an extra 'bus_clk' on some of its controllers, while mt8192 requires 8 clocks. Move the clock definitions inside if blocks that match on the compatibles. I used Patch from Nícolas F. R. A. Prado and modified it to not using "not" statement. Fixes: 59a23395d8aa ("dt-bindings: mmc: Add support for MT8192 SoC") Signed-off-by: Nícolas F. R. A. Prado Signed-off-by: Frank Wunderlich Reviewed-by: Krzysztof Kozlowski --- v2: - add this patch v3: - add blank lines and change "not" to matchlist - reorder entries - make generic first then order alphanumeric - rewrite commit description - drop soc-specific mt8183 - constraints were also set for it above v4: - re-add mt8183 reg-minitems --- .../devicetree/bindings/mmc/mtk-sd.yaml | 123 +++++++++++++----- 1 file changed, 93 insertions(+), 30 deletions(-) diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml index d8e1e2e9adf2..0cedeb12892d 100644 --- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml @@ -10,9 +10,6 @@ maintainers: - Chaotian Jing - Wenbin Mei -allOf: - - $ref: mmc-controller.yaml# - properties: compatible: oneOf: @@ -48,27 +45,11 @@ properties: description: Should contain phandle for the clock feeding the MMC controller. minItems: 2 - items: - - description: source clock (required). - - description: HCLK which used for host (required). - - description: independent source clock gate (required for MT2712). - - description: bus clock used for internal register access (required for MT2712 MSDC0/3). - - description: msdc subsys clock gate (required for MT8192). - - description: peripheral bus clock gate (required for MT8192). - - description: AXI bus clock gate (required for MT8192). - - description: AHB bus clock gate (required for MT8192). + maxItems: 7 clock-names: minItems: 2 - items: - - const: source - - const: hclk - - const: source_cg - - const: bus_clk - - const: sys_cg - - const: pclk_cg - - const: axi_cg - - const: ahb_cg + maxItems: 7 interrupts: description: @@ -190,15 +171,97 @@ required: - vmmc-supply - vqmmc-supply -if: - properties: - compatible: - contains: - const: mediatek,mt8183-mmc -then: - properties: - reg: - minItems: 2 +allOf: + - $ref: mmc-controller.yaml# + - if: + properties: + compatible: + enum: + - mediatek,mt2701-mmc + - mediatek,mt6779-mmc + - mediatek,mt6795-mmc + - mediatek,mt7620-mmc + - mediatek,mt7622-mmc + - mediatek,mt7623-mmc + - mediatek,mt8135-mmc + - mediatek,mt8173-mmc + - mediatek,mt8183-mmc + - mediatek,mt8186-mmc + - mediatek,mt8188-mmc + - mediatek,mt8195-mmc + - mediatek,mt8516-mmc + then: + properties: + clocks: + minItems: 2 + items: + - description: source clock + - description: HCLK which used for host + - description: independent source clock gate + clock-names: + minItems: 2 + items: + - const: source + - const: hclk + - const: source_cg + + - if: + properties: + compatible: + contains: + const: mediatek,mt2712-mmc + then: + properties: + clocks: + minItems: 3 + items: + - description: source clock + - description: HCLK which used for host + - description: independent source clock gate + - description: bus clock used for internal register access (required for MSDC0/3). + clock-names: + minItems: 3 + items: + - const: source + - const: hclk + - const: source_cg + - const: bus_clk + + - if: + properties: + compatible: + contains: + const: mediatek,mt8183-mmc + then: + properties: + reg: + minItems: 2 + + - if: + properties: + compatible: + contains: + const: mediatek,mt8192-mmc + then: + properties: + clocks: + items: + - description: source clock + - description: HCLK which used for host + - description: independent source clock gate + - description: msdc subsys clock gate + - description: peripheral bus clock gate + - description: AXI bus clock gate + - description: AHB bus clock gate + clock-names: + items: + - const: source + - const: hclk + - const: source_cg + - const: sys_cg + - const: pclk_cg + - const: axi_cg + - const: ahb_cg unevaluatedProperties: false