@@ -370,6 +370,7 @@ main_spi0: spi@20100000 {
clocks = <&k3_clks 141 0>;
dmas = <&main_pktdma 0xc300 0>, <&main_pktdma 0x4300 0>;
dma-names = "tx0", "rx0";
+ status = "disabled";
};
main_spi1: spi@20110000 {
@@ -380,6 +381,7 @@ main_spi1: spi@20110000 {
#size-cells = <0>;
power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 142 0>;
+ status = "disabled";
};
main_spi2: spi@20120000 {
@@ -390,6 +392,7 @@ main_spi2: spi@20120000 {
#size-cells = <0>;
power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 143 0>;
+ status = "disabled";
};
main_spi3: spi@20130000 {
@@ -400,6 +403,7 @@ main_spi3: spi@20130000 {
#size-cells = <0>;
power-domains = <&k3_pds 144 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 144 0>;
+ status = "disabled";
};
main_spi4: spi@20140000 {
@@ -410,6 +414,7 @@ main_spi4: spi@20140000 {
#size-cells = <0>;
power-domains = <&k3_pds 145 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 145 0>;
+ status = "disabled";
};
main_gpio_intr: interrupt-controller@a00000 {
@@ -60,6 +60,7 @@ mcu_spi0: spi@4b00000 {
#size-cells = <0>;
power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 147 0>;
+ status = "disabled";
};
mcu_spi1: spi@4b10000 {
@@ -70,6 +71,7 @@ mcu_spi1: spi@4b10000 {
#size-cells = <0>;
power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 148 0>;
+ status = "disabled";
};
mcu_gpio_intr: interrupt-controller@4210000 {
@@ -379,15 +379,8 @@ &mcu_gpio0 {
status = "reserved";
};
-&mcu_spi0 {
- status = "disabled";
-};
-
-&mcu_spi1 {
- status = "disabled";
-};
-
&main_spi0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_spi0_pins_default>;
ti,pindir-d0-out-d1-in;
@@ -375,14 +375,6 @@ exp2: gpio@60 {
};
};
-&mcu_spi0 {
- status = "disabled";
-};
-
-&mcu_spi1 {
- status = "disabled";
-};
-
/* mcu_gpio0 is reserved for mcu firmware usage */
&mcu_gpio0 {
status = "reserved";
SPI nodes defined in the top-level AM64x SoC dtsi files are incomplete and will not be functional unless they are extended with pinmux information. As the pinmux is only known at the board integration level, these nodes should only be enabled when provided with this information. Disable the SPI nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis <afd@ti.com> --- arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 5 +++++ arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi | 2 ++ arch/arm64/boot/dts/ti/k3-am642-evm.dts | 9 +-------- arch/arm64/boot/dts/ti/k3-am642-sk.dts | 8 -------- 4 files changed, 8 insertions(+), 16 deletions(-)