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+# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/remoteproc/ti,pru-consumer.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Common TI PRU Consumer Binding
+
+maintainers:
+  - Suman Anna <s-anna@ti.com>
+
+description: |
+  A PRU application/consumer/user node typically uses one or more PRU device
+  nodes to implement a PRU application/functionality. Each application/client
+  node would need a reference to at least a PRU node, and optionally define
+  some properties needed for hardware/firmware configuration. The below
+  properties are a list of common properties supported by the PRU remoteproc
+  infrastructure.
+
+  The application nodes shall define their own bindings like regular platform
+  devices, so below are in addition to each node's bindings.
+
+properties:
+  ti,prus:
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+    description: phandles to the PRU, RTU or Tx_PRU nodes used
+    minItems: 1
+    maxItems: 6
+    items:
+      maxItems: 1
+
+  firmware-name:
+    $ref: /schemas/types.yaml#/definitions/string-array
+    minItems: 1
+    maxItems: 6
+    description: |
+      firmwares for the PRU cores, the default firmware for the core from
+      the PRU node will be used if not provided. The firmware names should
+      correspond to the PRU cores listed in the 'ti,prus' property
+
+  ti,pruss-gp-mux-sel:
+    $ref: /schemas/types.yaml#/definitions/uint32-array
+    minItems: 1
+    maxItems: 6
+    items:
+      enum: [0, 1, 2, 3, 4]
+    description: |
+      array of values for the GP_MUX_SEL under PRUSS_GPCFG register for a PRU.
+      This selects the internal muxing scheme for the PRU instance. Values
+      should correspond to the PRU cores listed in the 'ti,prus' property. The
+      GP_MUX_SEL setting is a per-slice setting (one setting for PRU0, RTU0,
+      and Tx_PRU0 on K3 SoCs). Use the same value for all cores within the
+      same slice in the associative array. If the array size is smaller than
+      the size of 'ti,prus' property, the default out-of-reset value (0) for the
+      PRU core is used.
+
+required:
+  - ti,prus
+
+additionalProperties: true
+
+examples:
+  - |
+    /* PRU application node full example */
+    icssg2_eth: icssg2-eth {
+      compatible = "ti,am654-icssg-prueth";
+      pinctrl-names = "default";
+      pinctrl-0 = <&icssg2_rgmii_pins_default>;
+      sram = <&msmc_ram>;
+      ti,prus = <&pru2_0>, <&rtu2_0>, <&tx_pru2_0>,
+        <&pru2_1>, <&rtu2_1>, <&tx_pru2_1>;
+      firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
+          "ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
+          "ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
+          "ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
+          "ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
+          "ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";
+
+      ti,pruss-gp-mux-sel = <2>,      /* MII mode */
+                <2>,
+                <2>,
+                <2>,  /* MII mode */
+                <2>,
+                <2>;
+
+      ti,mii-g-rt = <&icssg2_mii_g_rt>;
+      ti,mii-rt = <&icssg2_mii_rt>;
+      iep = <&icssg2_iep0>,  <&icssg2_iep1>;
+
+      interrupt-parent = <&icssg2_intc>;
+      interrupts = <24 0 2>, <25 1 3>;
+      interrupt-names = "tx_ts0", "tx_ts1";
+
+      dmas = <&main_udmap 0xc300>, /* egress slice 0 */
+             <&main_udmap 0xc301>, /* egress slice 0 */
+             <&main_udmap 0xc302>, /* egress slice 0 */
+             <&main_udmap 0xc303>, /* egress slice 0 */
+             <&main_udmap 0xc304>, /* egress slice 1 */
+             <&main_udmap 0xc305>, /* egress slice 1 */
+             <&main_udmap 0xc306>, /* egress slice 1 */
+             <&main_udmap 0xc307>, /* egress slice 1 */
+
+             <&main_udmap 0x4300>, /* ingress slice 0 */
+             <&main_udmap 0x4301>, /* ingress slice 1 */
+             <&main_udmap 0x4302>, /* mgmnt rsp slice 0 */
+             <&main_udmap 0x4303>; /* mgmnt rsp slice 1 */
+      dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
+            "tx1-0", "tx1-1", "tx1-2", "tx1-3",
+            "rx0", "rx1",
+            "rxmgm0", "rxmgm1";
+
+      ethernet-ports {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        port@0 {
+          reg = <0>;
+          phy-handle = <&icssg2_phy0>;
+          phy-mode = "rgmii-rxid";
+          ti,syscon-rgmii-delay = <&scm_conf 0x4120>;
+          /* Filled in by bootloader */
+          local-mac-address = [00 00 00 00 00 00];
+        };
+        port@1 {
+          reg = <1>;
+          phy-handle = <&icssg2_phy1>;
+          phy-mode = "rgmii-rxid";
+          ti,syscon-rgmii-delay = <&scm_conf 0x4124>;
+          /* Filled in by bootloader */
+          local-mac-address = [00 00 00 00 00 00];
+        };
+      };
+    };
