@@ -109,6 +109,7 @@ enum sun4i_usb_phy_type {
sun8i_v3s_phy,
sun50i_a64_phy,
sun50i_h6_phy,
+ suniv_f1c100s_phy,
};
struct sun4i_usb_phy_cfg {
@@ -859,6 +860,14 @@ static int sun4i_usb_phy_probe(struct platform_device *pdev)
return 0;
}
+static const struct sun4i_usb_phy_cfg suniv_f1c100s_cfg = {
+ .num_phys = 1,
+ .type = suniv_f1c100s_phy,
+ .disc_thresh = 3,
+ .phyctl_offset = REG_PHYCTL_A10,
+ .dedicated_clocks = true,
+};
+
static const struct sun4i_usb_phy_cfg sun4i_a10_cfg = {
.num_phys = 3,
.type = sun4i_a10_phy,
@@ -988,6 +997,8 @@ static const struct of_device_id sun4i_usb_phy_of_match[] = {
{ .compatible = "allwinner,sun50i-a64-usb-phy",
.data = &sun50i_a64_cfg},
{ .compatible = "allwinner,sun50i-h6-usb-phy", .data = &sun50i_h6_cfg },
+ { .compatible = "allwinner,suniv-f1c100s-usb-phy",
+ .data = &suniv_f1c100s_cfg },
{ },
};
MODULE_DEVICE_TABLE(of, sun4i_usb_phy_of_match);
The F1C100s SoC has one USB OTG port connected to a MUSB controller. Add support for its USB PHY. Signed-off-by: Icenowy Zheng <uwu@icenowy.me> --- No changes since v1. drivers/phy/allwinner/phy-sun4i-usb.c | 11 +++++++++++ 1 file changed, 11 insertions(+)