| Message ID | 20220929232712.12202-4-Sergey.Semin@baikalelectronics.ru |
|---|---|
| State | New |
| Headers | show |
| Series | EDAC/mc/synopsys: Various fixes and cleanups | expand |
diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c index 17960f7ca29b..c6f3b383e5ff 100644 --- a/drivers/edac/synopsys_edac.c +++ b/drivers/edac/synopsys_edac.c @@ -858,7 +858,7 @@ static void mc_init(struct mem_ctl_info *mci, struct platform_device *pdev) /* Initialize controller capabilities and configuration */ mci->mtype_cap = MEM_FLAG_DDR3 | MEM_FLAG_DDR2; mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED; - mci->scrub_cap = SCRUB_HW_SRC; + mci->scrub_cap = SCRUB_FLAG_HW_SRC; mci->scrub_mode = SCRUB_NONE; mci->edac_cap = EDAC_FLAG_SECDED;
The mem_ctl_info.scrub_cap field is supposed to be set with the ECC scrub-related flags while the driver initializes it with the SCRUB_HW_SRC flag ID. It's definitely wrong, though hasn't caused any problem since the structure field isn't used by the EDAC core. Let's fix it anyway by using the SCRUB_FLAG_HW_SRC macro to initialize the field. Fixes: ae9b56e3996d ("EDAC, synps: Add EDAC support for zynq ddr ecc controller") Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> --- drivers/edac/synopsys_edac.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)