From patchwork Sat Sep 24 08:04:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 608932 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 502F1C6FA83 for ; Sat, 24 Sep 2022 08:07:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233866AbiIXIH4 (ORCPT ); Sat, 24 Sep 2022 04:07:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54690 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233690AbiIXIGs (ORCPT ); Sat, 24 Sep 2022 04:06:48 -0400 Received: from mail-lj1-x22d.google.com (mail-lj1-x22d.google.com [IPv6:2a00:1450:4864:20::22d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4EF2F1284A2 for ; Sat, 24 Sep 2022 01:05:42 -0700 (PDT) Received: by mail-lj1-x22d.google.com with SMTP id s10so2317820ljp.5 for ; Sat, 24 Sep 2022 01:05:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=8nwp/MQe8qtj/E8pIN4GqMEGKKKg4JslS5CxcegQMDk=; b=IHq5m2G1mEGHNQi9oW5df5bFeje0cLCRYx+363ZOhCWSr9Q0eu16Khx72mjZTzW2dL x6jI2lTJpDicPfpc7Md5EhYgLgvSplJZdqoB9XuXuhrMQ0j0fNJHcXIc+tieh4tAS14g mvR/BB7UJiCTPPiA7KzCb8fCALmpXWLc5EuuAEy7x2mAzGqVTBwUGDTA+aED2Wj1bgGo GjYI9A+l5Wq3ZvtUcxfL9RvwdJzjsXVEQjJqIH+9stdRPQ90TB+LV5jSe8YQ+dTJufNx g/d0BJVMlsJuXN9mQckTFJcP8P33D/LckdW5UnJUyydWZK7bSchDZJY0TqgOzsrEW9Wt Ukvg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=8nwp/MQe8qtj/E8pIN4GqMEGKKKg4JslS5CxcegQMDk=; b=pVccbf9F10XW4uVoViNSaNy5fhyGRGRiLULbvgItKiZ59NllDiU5r4t5o9tDiWTV0d gT54GqYMd6QQECrlxmldjZqzJpcl31QRVtHU5w6dQijLKIzlJ8Ph/3CK0tBxMo2UUeDu hGniTpFISvxtf/mfOj9K2xgHHhxQhVCHDh2OZMhk32ERddoEbqzAyHi9ngk+3ArnQ6Eq B2lydSPBUaS4OgblH1+xZUBlLB8QmWwO1poXr9BkdsFtS95CjXkQn5S38bUOLOTppPFV WI1+HDGf9CjXke7sneOfhOWnHLBQMLv/8mr68uETGF/w8cfT4GUMzNgcUaF6LX5BRtSe Vsiw== X-Gm-Message-State: ACrzQf18oPBqPRGMmEBTV6/M2MxRICvAoox4rvdOVd2tdyTJ5Ob/75bU m0nH8Jeb31yYmL5ITV2bn97l6w== X-Google-Smtp-Source: AMsMyM4mblzni5JIHJDLuKzTnjVszENydJNmoF0LQXizQvfXuLie03AcVN2cs8b8AhGvvDqu/z56/w== X-Received: by 2002:a05:651c:1111:b0:26c:6b0f:472c with SMTP id e17-20020a05651c111100b0026c6b0f472cmr4028189ljo.384.1664006741589; Sat, 24 Sep 2022 01:05:41 -0700 (PDT) Received: from krzk-bin.. (78-11-189-27.static.ip.netia.com.pl. [78.11.189.27]) by smtp.gmail.com with ESMTPSA id y2-20020a2e5442000000b0026c41574790sm1696668ljd.30.2022.09.24.01.05.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 24 Sep 2022 01:05:41 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Sricharan R , Stephan Gerhold , Shawn Guo , Vinod Koul , krishna Lanka , Sivaprakash Murugesan , linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 26/32] dt-bindings: pinctrl: qcom,sdx55: fix matching pin config Date: Sat, 24 Sep 2022 10:04:53 +0200 Message-Id: <20220924080459.13084-27-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220924080459.13084-1-krzysztof.kozlowski@linaro.org> References: <20220924080459.13084-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. qcom-sdx55-telit-fn980-tlb.dtb: pinctrl@f100000: 'pcie_ep_clkreq_default', 'pcie_ep_perst_default', 'pcie_ep_wake_default' do not match any of the regexes: '-pins$', 'pinctrl-[0-9]+' This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Signed-off-by: Krzysztof Kozlowski --- .../bindings/pinctrl/qcom,sdx55-pinctrl.yaml | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml index a38090b14aab..fff57abf4fbc 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml @@ -45,9 +45,17 @@ properties: gpio-reserved-ranges: maxItems: 1 -#PIN CONFIGURATION NODES patternProperties: - '-pins$': + "-state$": + oneOf: + - $ref: "#/$defs/qcom-sdx55-tlmm-state" + - patternProperties: + "-pins$": + $ref: "#/$defs/qcom-sdx55-tlmm-state" + additionalProperties: false + +$defs: + qcom-sdx55-tlmm-state: type: object description: Pinctrl node's client devices use subnodes for desired pin configuration. @@ -146,7 +154,7 @@ examples: #interrupt-cells = <2>; interrupts = ; - serial-pins { + serial-state { pins = "gpio8", "gpio9"; function = "blsp_uart3"; drive-strength = <8>;