From patchwork Thu Sep 22 19:56:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 608342 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 78136ECAAD8 for ; Thu, 22 Sep 2022 19:57:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232633AbiIVT5R (ORCPT ); Thu, 22 Sep 2022 15:57:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59674 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232563AbiIVT5G (ORCPT ); Thu, 22 Sep 2022 15:57:06 -0400 Received: from mail-lf1-x12e.google.com (mail-lf1-x12e.google.com [IPv6:2a00:1450:4864:20::12e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B6986E3ECB for ; Thu, 22 Sep 2022 12:57:04 -0700 (PDT) Received: by mail-lf1-x12e.google.com with SMTP id u18so16421881lfo.8 for ; Thu, 22 Sep 2022 12:57:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=MfBzbOv42rRAiReWCauD0AbaHonJ+8RmdTz4pUa1E/Q=; b=hA6RMr/DAnnyt8rfQ77T67Z2LZjzItdeC22ZKLfPfobCPOpHfMCivQJa4rTQuoV6yd Xt/sxlhO6IR+v3lGZDh0FiTPqOf9BnOQVOLvESBOl7wKMEU16TF26x9jtAcvUSmwD0s2 Z4s3BAgt4gpcX+3shoLF83bWVpzZ2w/suVJtGl1Ny88veV1vTYNtXqt90WBerwRFULfp 9CfROxKX7V2wteZu7YNXIHWDQqr9xJGqzNnoCHQO0DrYX7JfD66eUZriP08K0FqrK7mV /PAIqJXXTOXfkgWMein8ZOsQOtdiekwKKfnC1dzQesqM/ZVSijfkctrTFDuHYyVyeVCR PVFg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=MfBzbOv42rRAiReWCauD0AbaHonJ+8RmdTz4pUa1E/Q=; b=2Ql+P46A6tAfztDGsAwYPuK9UULniTjFVrrBpbUBcdMVuZfaaeYJEc9Us52Wm2YVh5 XqRrqSvyynrvrSC4cWldMSzioymjbF+OPU+PlykbkZ7krWIyxfXE3bQoOP2ejalf9Lvi pTUrKEoMiKP4En4nvxdIh3bW4uU9yqtkQgMfIB/45RiPI1Ptb7oJ6gz6zpZEx77NdZhM F/u7j65Oz/6iTfs2roimDqOo8ujgsqMndvymahVn2n35vfLzgSdL+A9ilptjPhxLfZys NlWk5WIkv8vPlPJMu3wBsXBezLWuDTtPGhIO9ndOG+ng8OpZXJfSyKT/0fN+/Tq5eknq XUEg== X-Gm-Message-State: ACrzQf1pug0bq78ZqAiZwTnxkcY/+58sSKP7BcwMJc6kE2YbVpJg5epS CKPjkqIKSxOb4BORolW+NDc71Q== X-Google-Smtp-Source: AMsMyM6V5pDiKk9QTYafbge+gpsWtZWHnOKidEkmcaVU/zdLMpLPHr2bq7qDjg7TnzEn9H/GQQGQgg== X-Received: by 2002:ac2:5191:0:b0:497:ac0c:cf65 with SMTP id u17-20020ac25191000000b00497ac0ccf65mr2057291lfi.436.1663876624272; Thu, 22 Sep 2022 12:57:04 -0700 (PDT) Received: from krzk-bin.. (78-11-189-27.static.ip.netia.com.pl. [78.11.189.27]) by smtp.gmail.com with ESMTPSA id x15-20020a19e00f000000b00498fc3d4d15sm1079375lfg.190.2022.09.22.12.57.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 12:57:03 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Srinivas Kandagatla , linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 06/12] dt-bindings: pinctrl: qcom,sm8450-lpass-lpi: fix matching pin config Date: Thu, 22 Sep 2022 21:56:45 +0200 Message-Id: <20220922195651.345369-7-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220922195651.345369-1-krzysztof.kozlowski@linaro.org> References: <20220922195651.345369-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The LPASS pin controller follows generic pin-controller bindings, so just like TLMM, should have subnodes with '-state' and '-pins'. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring --- .../qcom,sm8450-lpass-lpi-pinctrl.yaml | 36 +++++++++++++++++-- 1 file changed, 34 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml index c17cdff6174f..0e0769a7751c 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml @@ -43,9 +43,17 @@ properties: gpio-ranges: maxItems: 1 -#PIN CONFIGURATION NODES patternProperties: - '-pins$': + "-state$": + oneOf: + - $ref: "#/$defs/qcom-sm8450-lpass-tlmm-state" + - patternProperties: + "-pins$": + $ref: "#/$defs/qcom-sm8450-lpass-tlmm-state" + additionalProperties: false + +$defs: + qcom-sm8450-lpass-tlmm-state: type: object description: Pinctrl node's client devices use subnodes for desired pin configuration. @@ -132,4 +140,28 @@ examples: gpio-controller; #gpio-cells = <2>; gpio-ranges = <&lpi_tlmm 0 0 23>; + + wsa-swr-active-state { + clk-pins { + pins = "gpio10"; + function = "wsa_swr_clk"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + + data-pins { + pins = "gpio11"; + function = "wsa_swr_data"; + drive-strength = <2>; + slew-rate = <1>; + }; + }; + + tx-swr-sleep-clk-state { + pins = "gpio0"; + function = "swr_tx_clk"; + drive-strength = <2>; + bias-pull-down; + }; };