From patchwork Fri Sep 16 11:26:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 606598 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9987AECAAD8 for ; Fri, 16 Sep 2022 11:27:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231247AbiIPL1f (ORCPT ); Fri, 16 Sep 2022 07:27:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56312 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231126AbiIPL1a (ORCPT ); Fri, 16 Sep 2022 07:27:30 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 532C1A3D62; Fri, 16 Sep 2022 04:27:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1663327643; x=1694863643; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VqcEjdujxakv3noDHpoHtBuaB79FIa784j+2h1ikqjc=; b=RKOA0hvf3E/8FWa/aNzpyCMN7HilEHrPwc7CfaltYEEjmzX87IuuQCG8 kGl8aAjc+tAsMjkfekhMV+P2SKBE92pH7inwB7OXsZeuzVi9qhvHKw9Zs pSbjafGRx6/lEsP7GKKeA4DRWzGpA6SobWdoTGh38B5ySeQNXj9xzorUP HjRWvsH2hqeEevw7oJZgOCQ3KyXirSHzy5E690R8BlOYpdGhsgWtApOnx 7EOAkIJumYXDHYGRnqStZW6BD4xNlak+5+tj0ISo2Cp6Y/yWIEZPVgC/R DUzX1B/m1NWjRK2DRGgA9tJk0MEiTXF4VPm+9RDunPI5OgM3QYmWILwuf g==; X-IronPort-AV: E=Sophos;i="5.93,320,1654585200"; d="scan'208";a="114001499" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 16 Sep 2022 04:27:22 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Fri, 16 Sep 2022 04:27:22 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Fri, 16 Sep 2022 04:27:19 -0700 From: Conor Dooley To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Daire McNamara , Shravan Chippa CC: Paul Walmsley , Palmer Dabbelt , Albert Ou , Cyril Jean , Lewis Hanly , Vattipalli Praveen , Wolfgang Grandegger , Hugh Breslin , , , , Krzysztof Kozlowski Subject: [PATCH v5 03/10] dt-bindings: riscv: microchip: document the sev kit Date: Fri, 16 Sep 2022 12:26:39 +0100 Message-ID: <20220916112645.567794-4-conor.dooley@microchip.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220916112645.567794-1-conor.dooley@microchip.com> References: <20220916112645.567794-1-conor.dooley@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Shravan Chippa Update devicetree bindings document with PolarFire SoC Video Kit, known by its "sev-kit" product code. Link: https://onlinedocs.microchip.com/pr/GUID-404D3738-DC76-46BA-8683-6A77E837C2DD-en-US-1/index.html?GUID-065AEBEE-7B2C-4895-8579-B1D73D797F06 Signed-off-by: Shravan Chippa Reviewed-by: Krzysztof Kozlowski Signed-off-by: Conor Dooley --- Documentation/devicetree/bindings/riscv/microchip.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/riscv/microchip.yaml b/Documentation/devicetree/bindings/riscv/microchip.yaml index 630f82c85a0c..ab0a64cd5386 100644 --- a/Documentation/devicetree/bindings/riscv/microchip.yaml +++ b/Documentation/devicetree/bindings/riscv/microchip.yaml @@ -28,6 +28,7 @@ properties: - items: - enum: - aries,m100pfsevp + - microchip,mpfs-sev-kit - sundance,polarberry - const: microchip,mpfs