From patchwork Thu Sep 15 23:34:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Li X-Patchwork-Id: 606324 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8C445C6FA8B for ; Thu, 15 Sep 2022 23:34:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229727AbiIOXeq (ORCPT ); Thu, 15 Sep 2022 19:34:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46878 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229533AbiIOXen (ORCPT ); Thu, 15 Sep 2022 19:34:43 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E2F13A456; Thu, 15 Sep 2022 16:34:40 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id A0B2E205BAF; Fri, 16 Sep 2022 01:34:39 +0200 (CEST) Received: from smtp.na-rdc02.nxp.com (usphx01srsp001v.us-phx01.nxp.com [134.27.49.11]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 61291205BAD; Fri, 16 Sep 2022 01:34:39 +0200 (CEST) Received: from right.am.freescale.net (right.am.freescale.net [10.81.116.134]) by usphx01srsp001v.us-phx01.nxp.com (Postfix) with ESMTP id 217C840AA3; Thu, 15 Sep 2022 16:34:38 -0700 (MST) From: Li Yang To: shawnguo@kernel.org, devicetree@vger.kernel.org Cc: robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Xiaowei Bao , Li Yang Subject: [PATCH v2 2/9] arm64: dts: ls1046a: Add the PME interrupt and big-endian to PCIe EP nodes Date: Thu, 15 Sep 2022 18:34:25 -0500 Message-Id: <20220915233432.31660-3-leoyang.li@nxp.com> X-Mailer: git-send-email 2.25.1.377.g2d2118b In-Reply-To: <20220915233432.31660-1-leoyang.li@nxp.com> References: <20220915233432.31660-1-leoyang.li@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Xiaowei Bao Add the PME interrupt porperty and big-endian property in PCIe EP nodes. Signed-off-by: Xiaowei Bao Signed-off-by: Li Yang --- arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index ddae3cb0a977..8002d83b341b 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -813,8 +813,11 @@ pcie_ep1: pcie_ep@3400000 { reg = <0x00 0x03400000 0x0 0x00100000>, <0x40 0x00000000 0x8 0x00000000>; reg-names = "regs", "addr_space"; + interrupts = ; + interrupt-names = "pme"; num-ib-windows = <6>; num-ob-windows = <8>; + big-endian; status = "disabled"; }; @@ -849,8 +852,11 @@ pcie_ep2: pcie_ep@3500000 { reg = <0x00 0x03500000 0x0 0x00100000>, <0x48 0x00000000 0x8 0x00000000>; reg-names = "regs", "addr_space"; + interrupts = ; + interrupt-names = "pme"; num-ib-windows = <6>; num-ob-windows = <8>; + big-endian; status = "disabled"; }; @@ -885,8 +891,11 @@ pcie_ep3: pcie_ep@3600000 { reg = <0x00 0x03600000 0x0 0x00100000>, <0x50 0x00000000 0x8 0x00000000>; reg-names = "regs", "addr_space"; + interrupts = ; + interrupt-names = "pme"; num-ib-windows = <6>; num-ob-windows = <8>; + big-endian; status = "disabled"; };