From patchwork Thu Sep 15 07:58:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?UmV4LUJDIENoZW4gKOmZs+afj+i+sCk=?= X-Patchwork-Id: 606695 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F423EECAAA1 for ; Thu, 15 Sep 2022 07:59:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230155AbiIOH7M (ORCPT ); Thu, 15 Sep 2022 03:59:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50756 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230153AbiIOH7I (ORCPT ); Thu, 15 Sep 2022 03:59:08 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5BD7A97D44; Thu, 15 Sep 2022 00:59:01 -0700 (PDT) X-UUID: d57d51cbdd174d968993618c4cfc38c3-20220915 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=VcfOR6rajSj1mr0bs/JuGWx4Do71T785IC8UO7uZz0I=; b=AcD7tLu0ShGC7C8f4It23LaKPc48WtFk6beVHKOUacQowJfeMVz7DcAmzcB3WGLsBrN0/W7Ztj1xJp10I3K/j19BVmQSKDDmePYh4O0dyh6fDfMhkU0Xr6ZlU2f2zwcXjTH+Ylhc33PEWe+g4wpuqLR7mP/6Gns1JM/2B25acbc=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.11, REQID:1526d84c-7139-454c-8160-2b713bcb9196, IP:0, U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:-5 X-CID-META: VersionHash:39a5ff1, CLOUDID:a471b97b-ea28-4199-b57e-003c7d60873a, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: d57d51cbdd174d968993618c4cfc38c3-20220915 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 89464902; Thu, 15 Sep 2022 15:58:52 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 15 Sep 2022 15:58:50 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 15 Sep 2022 15:58:50 +0800 From: Bo-Chen Chen To: , CC: , , , , , , , Bo-Chen Chen Subject: [PATCH 2/4] arm64: dts: mt8195: Add dptx nodes Date: Thu, 15 Sep 2022 15:58:47 +0800 Message-ID: <20220915075849.1920-3-rex-bc.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220915075849.1920-1-rex-bc.chen@mediatek.com> References: <20220915075849.1920-1-rex-bc.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add edptx and dptx nodes for MT8195. Signed-off-by: Bo-Chen Chen --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 25 ++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index 93e6a106a9b8..6f3f9bf3dc54 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -1241,6 +1241,9 @@ reg = <0x189 0x2>; bits = <7 5>; }; + dp_calibration: dp-data@1ac { + reg = <0x1ac 0x10>; + }; }; u3phy2: t-phy@11c40000 { @@ -2178,5 +2181,27 @@ clock-names = "engine", "pixel", "pll"; status = "disabled"; }; + + edp_tx: edp-tx@1c500000 { + status = "disabled"; + compatible = "mediatek,mt8195-edp-tx"; + reg = <0 0x1c500000 0 0x8000>; + nvmem-cells = <&dp_calibration>; + nvmem-cell-names = "dp_calibration_data"; + power-domains = <&spm MT8195_POWER_DOMAIN_EPD_TX>; + interrupts = ; + max-linkrate-mhz = <8100>; + }; + + dp_tx: dp-tx@1c600000 { + compatible = "mediatek,mt8195-dp-tx"; + reg = <0 0x1c600000 0 0x8000>; + nvmem-cells = <&dp_calibration>; + nvmem-cell-names = "dp_calibration_data"; + power-domains = <&spm MT8195_POWER_DOMAIN_DP_TX>; + interrupts = ; + status = "disabled"; + max-linkrate-mhz = <8100>; + }; }; };