From patchwork Thu Sep 8 11:17:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 603996 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B81E3C6FA82 for ; Thu, 8 Sep 2022 11:18:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230437AbiIHLSx (ORCPT ); Thu, 8 Sep 2022 07:18:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32784 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231187AbiIHLSj (ORCPT ); Thu, 8 Sep 2022 07:18:39 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C6C43113656; Thu, 8 Sep 2022 04:18:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1662635907; x=1694171907; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=YhYXviQLdmzZaww64eXm52VKSDr5s7UwTuPOh/Kuq5o=; b=OZ6RmZ2w7wHAoMT5+wQ+vCej2+7nwweFi5+PPSOzblnva4h4HjWI2/rm wU2fSF7BnNz95cxn+vmpTlZqM7R9xLJH87M1n6oDSbyO8GAvaEx1AafT+ Ug0HO97CnBAOOUATcvzjLP8HWM1mb6tJcQuHYgCjQxQ0gnQFwqwwsXr+n hfMYRrKCnYEvNNJd99ilbBi6IwZ96p4zG9iAe45cgyFRjYwtvafW21zbN qM6XxJf1+4L0ACplwhUCQUrPO+Qwpt4eUCmMAGzRq/KVeaz/YyVH+lHWl Op/Xv3eANq7YfoRGSgCl+g2Jxyy7kMS12h9h9X1wulR/TyqS/Vmu1VY8j w==; X-IronPort-AV: E=Sophos;i="5.93,299,1654585200"; d="scan'208";a="172932964" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 08 Sep 2022 04:18:26 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Thu, 8 Sep 2022 04:18:23 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Thu, 8 Sep 2022 04:18:20 -0700 From: Conor Dooley To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Daire McNamara , Shravan Chippa CC: Paul Walmsley , Palmer Dabbelt , Albert Ou , Cyril Jean , Lewis Hanly , Vattipalli Praveen , Wolfgang Grandegger , Hugh Breslin , , , Subject: [PATCH v4 08/10] riscv: dts: microchip: reduce the fic3 clock rate Date: Thu, 8 Sep 2022 12:17:11 +0100 Message-ID: <20220908111712.665287-9-conor.dooley@microchip.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220908111712.665287-1-conor.dooley@microchip.com> References: <20220908111712.665287-1-conor.dooley@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org For the v2022.09 release of the reference design, the fic3 clock rate been reduced from 62.5 MHz to 50 MHz as it allows timing to be closed significantly more quickly by customers who chose to build the reference design themselves. Signed-off-by: Conor Dooley --- arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi index 98f04be0dc6b..c2aac1a7e862 100644 --- a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi +++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi @@ -30,7 +30,7 @@ i2c2: i2c@40000200 { fabric_clk3: fabric-clk3 { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <62500000>; + clock-frequency = <50000000>; }; fabric_clk1: fabric-clk1 {