From patchwork Tue Aug 30 12:52:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 601198 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CDACEC0502E for ; Tue, 30 Aug 2022 12:53:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229869AbiH3Mxr (ORCPT ); Tue, 30 Aug 2022 08:53:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48220 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229997AbiH3Mxi (ORCPT ); Tue, 30 Aug 2022 08:53:38 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B537B12F555; Tue, 30 Aug 2022 05:53:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1661864013; x=1693400013; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7t9fB7n5BXz/TvDnDRUyp7NhU4pUYNzktSxEQMgJVzo=; b=fZ9p2K9EiRmCpFvKYjbw/SrlOt6ccytPl2aBoOGAZ+QHIqymZveaYY5w EJyMZvADxmLQ2Q+tvnsmsU+DN1JkOMkIJO1S6zMubPJBVtfg7EtCQgvcm 9UH2mXVvlEZDIx9coQb/vfQqt8EwM7J4vvKpHk2PLLntYNdD4bGp2+zUT GawSj/zwXzZpnYQ6bRrRdouPZo//AIvkb0dnzb0mZSpmV3lCk+Hxbs2F7 gfdETuJImLbLA7fJ/RaSc5I+P66YgdGfEEAQO8UZPtdzQwKIfsx6bv8Zy ulCsp1DTM/Dr4gMiSdYTm+n70GdZqJMg1tEqqUtG0dorsKganFw6dwW/h Q==; X-IronPort-AV: E=Sophos;i="5.93,275,1654585200"; d="scan'208";a="174802637" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 30 Aug 2022 05:53:31 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Tue, 30 Aug 2022 05:53:30 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Tue, 30 Aug 2022 05:53:27 -0700 From: Conor Dooley To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Palmer Dabbelt , Conor Dooley , Daire McNamara CC: Paul Walmsley , Albert Ou , Claudiu Beznea , , , , Subject: [PATCH v4 05/13] MAINTAINERS: add polarfire soc reset controller Date: Tue, 30 Aug 2022 13:52:42 +0100 Message-ID: <20220830125249.2373416-5-conor.dooley@microchip.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220830125110.2372514-1-conor.dooley@microchip.com> References: <20220830125110.2372514-1-conor.dooley@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the newly added reset controller for the PolarFire SoC (MPFS) to the existing MAINTAINERS entry. Reviewed-by: Daire McNamara Signed-off-by: Conor Dooley --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 8a5012ba6ff9..6136b1b22e2c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -17532,6 +17532,7 @@ F: drivers/char/hw_random/mpfs-rng.c F: drivers/clk/microchip/clk-mpfs.c F: drivers/mailbox/mailbox-mpfs.c F: drivers/pci/controller/pcie-microchip-host.c +F: drivers/reset/reset-mpfs.c F: drivers/rtc/rtc-mpfs.c F: drivers/soc/microchip/ F: drivers/spi/spi-microchip-core.c