From patchwork Wed Aug 24 22:36:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Li X-Patchwork-Id: 599836 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D3561C6498F for ; Wed, 24 Aug 2022 22:37:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230165AbiHXWhQ (ORCPT ); Wed, 24 Aug 2022 18:37:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59124 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230133AbiHXWhO (ORCPT ); Wed, 24 Aug 2022 18:37:14 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3B34E74CF7; Wed, 24 Aug 2022 15:37:12 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 063F02014BA; Thu, 25 Aug 2022 00:37:11 +0200 (CEST) Received: from smtp.na-rdc02.nxp.com (usphx01srsp001v.us-phx01.nxp.com [134.27.49.11]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id BA98B2014B5; Thu, 25 Aug 2022 00:37:10 +0200 (CEST) Received: from right.am.freescale.net (right.am.freescale.net [10.81.116.134]) by usphx01srsp001v.us-phx01.nxp.com (Postfix) with ESMTP id 6415740A9F; Wed, 24 Aug 2022 15:37:09 -0700 (MST) From: Li Yang To: shawnguo@kernel.org, devicetree@vger.kernel.org Cc: robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Hou Zhiqiang , Li Yang Subject: [PATCH 05/11] arm64: dts: ls1043a: Add big-endian property for PCIe nodes Date: Wed, 24 Aug 2022 17:36:56 -0500 Message-Id: <20220824223700.32442-6-leoyang.li@nxp.com> X-Mailer: git-send-email 2.25.1.377.g2d2118b In-Reply-To: <20220824223700.32442-1-leoyang.li@nxp.com> References: <20220824223700.32442-1-leoyang.li@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Hou Zhiqiang Add the big-endian property for LS1043A PCIe nodes for accessing PEX_LUT and PF register block. Signed-off-by: Hou Zhiqiang Signed-off-by: Li Yang --- arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi index 6b2bfb5c6f32..3ebc608875b5 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi @@ -902,6 +902,7 @@ pcie1: pcie@3400000 { <0000 0 0 3 &gic 0 112 0x4>, <0000 0 0 4 &gic 0 113 0x4>; fsl,pcie-scfg = <&scfg 0>; + big-endian; status = "disabled"; }; @@ -929,6 +930,7 @@ pcie2: pcie@3500000 { <0000 0 0 3 &gic 0 122 0x4>, <0000 0 0 4 &gic 0 123 0x4>; fsl,pcie-scfg = <&scfg 1>; + big-endian; status = "disabled"; }; @@ -956,6 +958,7 @@ pcie3: pcie@3600000 { <0000 0 0 3 &gic 0 156 0x4>, <0000 0 0 4 &gic 0 157 0x4>; fsl,pcie-scfg = <&scfg 2>; + big-endian; status = "disabled"; };