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Mon, 22 Aug 2022 17:53:22 +0000 From: Shenwei Wang To: Rob Herring , Krzysztof Kozlowski , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Peng Fan Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, NXP Linux Team , Shenwei Wang , Rob Herring Subject: [PATCH v6 1/5] dt-bindings: firmware: add missing resource IDs for imx8dxl Date: Mon, 22 Aug 2022 12:52:41 -0500 Message-Id: <20220822175245.222691-2-shenwei.wang@nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220822175245.222691-1-shenwei.wang@nxp.com> References: <20220822175245.222691-1-shenwei.wang@nxp.com> X-ClientProxiedBy: BYAPR05CA0070.namprd05.prod.outlook.com (2603:10b6:a03:74::47) To AM9PR04MB8274.eurprd04.prod.outlook.com (2603:10a6:20b:3e8::23) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 6b43034c-b138-4fae-a5ff-08da846734a1 X-MS-TrafficTypeDiagnostic: VI1PR0402MB3790:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Signed-off-by: Shenwei Wang Acked-by: Rob Herring --- include/dt-bindings/firmware/imx/rsrc.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/include/dt-bindings/firmware/imx/rsrc.h b/include/dt-bindings/firmware/imx/rsrc.h index 43885056557c..1675de05ad33 100644 --- a/include/dt-bindings/firmware/imx/rsrc.h +++ b/include/dt-bindings/firmware/imx/rsrc.h @@ -37,10 +37,14 @@ #define IMX_SC_R_DC_0_BLIT2 21 #define IMX_SC_R_DC_0_BLIT_OUT 22 #define IMX_SC_R_PERF 23 +#define IMX_SC_R_USB_1_PHY 24 #define IMX_SC_R_DC_0_WARP 25 +#define IMX_SC_R_V2X_MU_0 26 +#define IMX_SC_R_V2X_MU_1 27 #define IMX_SC_R_DC_0_VIDEO0 28 #define IMX_SC_R_DC_0_VIDEO1 29 #define IMX_SC_R_DC_0_FRAC0 30 +#define IMX_SC_R_V2X_MU_2 31 #define IMX_SC_R_DC_0 32 #define IMX_SC_R_GPU_2_PID0 33 #define IMX_SC_R_DC_0_PLL_0 34 @@ -49,7 +53,10 @@ #define IMX_SC_R_DC_1_BLIT1 37 #define IMX_SC_R_DC_1_BLIT2 38 #define IMX_SC_R_DC_1_BLIT_OUT 39 +#define IMX_SC_R_V2X_MU_3 40 +#define IMX_SC_R_V2X_MU_4 41 #define IMX_SC_R_DC_1_WARP 42 +#define IMX_SC_R_SECVIO 44 #define IMX_SC_R_DC_1_VIDEO0 45 #define IMX_SC_R_DC_1_VIDEO1 46 #define IMX_SC_R_DC_1_FRAC0 47