From patchwork Sat Aug 20 08:29:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 598806 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D83AC32793 for ; Sat, 20 Aug 2022 08:30:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344500AbiHTIaP (ORCPT ); Sat, 20 Aug 2022 04:30:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36864 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344442AbiHTIaL (ORCPT ); Sat, 20 Aug 2022 04:30:11 -0400 Received: from mail-ed1-x52c.google.com (mail-ed1-x52c.google.com [IPv6:2a00:1450:4864:20::52c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8C5E155A6 for ; Sat, 20 Aug 2022 01:30:10 -0700 (PDT) Received: by mail-ed1-x52c.google.com with SMTP id q2so5963077edb.6 for ; Sat, 20 Aug 2022 01:30:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=lWZi59XScjXJ80MDC5jcujdInKKUzRF+AceVZxJZy/4=; b=Pl93p40mRr8ZVgXAZEBtmxL0RVPcWJvjmkqG8a948yFu/ef/W2+raIBtyhHGdWm09s nU6ic8dp1mnqm5/vjmuSHXbsApqkyjH8ItftqqFupeIyM9/DD0XnM8OYLB73hvXTbU22 cK+rXh91VdHklECBq3ziG39pN/2/+f7GjRiMU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=lWZi59XScjXJ80MDC5jcujdInKKUzRF+AceVZxJZy/4=; b=s85azWkpEX1tMKSXsFyYmh10kYkTCxX16toSFkuonCq5xZaJ7VPGIjTzF7m29XlGKe ADUPqlPMIHN/yeTSV1opmA1avnUX2ixsBa/MGa9suwVTYpRPcSVop97sN1U0mTazm5MO XtcUtZUnWKhmieiq3NeSBaJACTfzBvwWhVEHso37NxSU1NxUbBH40PK9WL8JK0kg4/G0 wuzAQJUvKjNBdzHp8TTkJ4xuo75h90+1M6dW9k12kXYk9SeNBfpuZ0cAGnKFxTMmGsG+ r2dD36ThtpnR1yI2r0Bl3GQu1j5T+tlRotfEQM27z6/auPqwMv/Svf3SJ42o285t3ApA w+FA== X-Gm-Message-State: ACgBeo0SztITGcb/8sqtwzJ+gBaadT0j1K+VzJ0VQe5+80+Gpcoz9IWz Vc40vLmrQviuZYR1/akUgqjtrA== X-Google-Smtp-Source: AA6agR6HoVv6K1JfDzqNlGHyOC7s8UkuUTM/czwKoSt7sLoTofnhIwzulOB9wBrhLPMwFJfWrreqVw== X-Received: by 2002:a05:6402:3288:b0:446:5d0b:1b26 with SMTP id f8-20020a056402328800b004465d0b1b26mr3270132eda.379.1660984209209; Sat, 20 Aug 2022 01:30:09 -0700 (PDT) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-79-31-31-9.retail.telecomitalia.it. [79.31.31.9]) by smtp.gmail.com with ESMTPSA id gx14-20020a1709068a4e00b0072b33e91f96sm3336112ejc.190.2022.08.20.01.30.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 20 Aug 2022 01:30:08 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Alexandre Torgue , Amarula patchwork , Marc Kleine-Budde , michael@amarulasolutions.com, Dario Binacchi , Dario Binacchi , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [RFC PATCH v2 3/4] ARM: dts: stm32: add pin map for CAN controller on stm32f4 Date: Sat, 20 Aug 2022 10:29:35 +0200 Message-Id: <20220820082936.686924-4-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220820082936.686924-1-dario.binacchi@amarulasolutions.com> References: <20220820082936.686924-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add pin configurations for using CAN controller on stm32f469-disco board. They are located on the Arduino compatible connector CN5 (CAN1) and on the extension connector CN12 (CAN2). Signed-off-by: Dario Binacchi Signed-off-by: Dario Binacchi --- Changes in v2: - Remove a blank line. arch/arm/boot/dts/stm32f4-pinctrl.dtsi | 31 ++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi index 500bcc302d42..3a9c3180fbf9 100644 --- a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi @@ -448,6 +448,37 @@ pins2 { slew-rate = <2>; }; }; + + can1_pins_a: can1-0 { + pins1 { + pinmux = ; /* CAN1_TX */ + }; + pins2 { + pinmux = ; /* CAN1_RX */ + bias-pull-up; + }; + }; + + can2_pins_a: can2-0 { + pins1 { + pinmux = ; /* CAN2_TX */ + }; + pins2 { + pinmux = ; /* CAN2_RX */ + bias-pull-up; + }; + }; + + can2_pins_b: can2-1 { + pins1 { + pinmux = ; /* CAN2_TX */ + }; + pins2 { + pinmux = ; /* CAN2_RX */ + bias-pull-up; + }; + }; + }; }; };